Method and apparatus for protecting internal memory from external access

Abstract

Method and apparatus for protecting internal memory from external access. A method for protecting a memory space from external access is provided. A plurality of lock bits are stored in a location in memory, each associated with a separate logical portion of the memory space and determinative as to the access thereof for a predetermined operation thereon. A request is then detected for access to a location in the memory space for operating thereon. The requested operation is then compared with the associated lock bit in the associated logical portion and then it is determined if access is allowed for the requested operation. If allowed, the requested operation is performed.

1 . A method for protecting a memory space from external access, comprising the steps of:
 storing in a location in memory a plurality of lock bits, each associated with a separate logical portion of the memory space and determinative as to the access thereof for a predetermined memory access operation thereon;   detecting a request for access to a desired location in the memory space for operating thereon;   comparing the requested memory access operation with the associated lock bit in the associated logical portion and determining if access is allowed for the requested memory access operation; and   if allowed, performing the requested memory access operation on the desired location in the memory space.   
   
   
       2 . The method of  claim 1 , wherein the predetermined operation is a read of an addressable location in the associated logical portion. 
   
   
       3 . The method of  claim 1 , wherein the predetermined operation is a write of an addressable location in the associated logical portion. 
   
   
       4 . The method of  claim 1 , wherein the predetermined operation is an erase of the associated logical portion for an addressable location therein. 
   
   
       5 . The method of  claim 1 , wherein the step of storing in a location the plurality of lock bits comprises storing in a variable location in the memory the plurality of lock bits and storing the lock bit location in a known location in the memory, such that in the step of comparing, the location of the lock bits is first read from the memory and then the lock bits read from the memory. 
   
   
       6 . The method of  claim 5 , wherein the predetermined operation is an erase of the lock bits. 
   
   
       7 . The method of  claim 6 , wherein the predetermined operation of erasing the lock bits requires that each of an associated lower logical portion of the memory having a relatively lower logical memory address and not containing lock bits be erased before a top most portion of memory having a relatively higher logical address than the lower logical portion is erased, which top most portion of the memory contains the lock bits.