Telecommunications switch array with thyristor addressing

Abstract

An apparatus for switching microwave signals includes a plurality of input lines, a plurality of output lines; and a plurality of thyristors. Each thyristor has a lower conducting surface that is electrically connected to one of the input lines and an upper conducting surface that is electrically connected to one of the output lines. A selected thyristor transmits a microwave signal between a selected input line and a selected output line in an ON state and blocks the microwave signal between the selected input line and the selected output line in an OFF state.

1 . An apparatus for switching microwave signals, comprising:
 a plurality of input lines;   a plurality of output lines; and   a plurality of thyristors, each thyristor having a lower conducting surface that is electrically connected to one of the input lines and an upper conducting surface that is electrically connected to one of the output lines, wherein   a selected thyristor transmits a microwave signal between a selected input line and a selected output line in an ON state and blocks the microwave signal between the selected input line and the selected output line in an OFF state.   
   
   
       2 . An apparatus as claimed in  claim 1 , wherein
 the apparatus is configured as a permutation switch,   a combination of an input turn-on pulse along the selected input line and an output turn-on pulse along the selected output line switches the selected thyristor from the OFF state to the ON state while leaving other thyristors unswitched, and   a combination of an input turn-off pulse along the selected input line and an output turn-off pulse along the selected output line switches the selected thyristor from the ON state to the OFF state while leaving other thyristors unswitched.   
   
   
       3 . An apparatus as claimed in  claim 2 , farther comprising
 a plurality of input pulse circuits connected to the input lines; and   a plurality of output pulse circuits connected to the output lines, wherein   the input-pulse circuits operate to generate input turn-on pulses and input turn-off pulses, and   the output-pulse circuits operate to generate output turn-on pulses and the output turn-off pulses.   
   
   
       4 . An apparatus as claimed in  claim 3 , wherein
 input turn-on pulses and output turn-on pulses are nearly equal in magnitude and opposite in polarity, and   input turn-off pulses and output turn-off pulses are nearly equal in magnitude and opposite in polarity.   
   
   
       5 . An apparatus as claimed in  claim 1 , wherein each thyristor includes a plurality of semiconductor layers disposed on a substrate, the semiconductor layers including at least one semi-insulating layer. 
   
   
       6 . An apparatus as claimed in  claim 5 , wherein
 the semiconductor layers include GaAs (gallium arsenide), and   said at least one semi-insulating layer includes semi-insulating GaAs.   
   
   
       7 . An apparatus as claimed in  claim 5 , wherein
 the semiconductor layers include Si (silicon), and   said at least one semi-insulating layer includes intrinsic Si.   
   
   
       8 . An apparatus as claimed in  claim 5 , wherein the frequency of the microwave signal is at least 1 GHz. 
   
   
       9 . An apparatus as claimed in  claim 5 , wherein
 each thyristor is configured as a mesa, and   said at least one semi-insulating layer includes a first semi-insulating layer and a second semi-insulating layer.   
   
   
       10 . An apparatus as claimed in  claim 5 , wherein
 the semiconductor layers include GaAs,   said at least one semi-insulating layer includes semi-insulating GaAs,   an upper semiconductor layer includes Al GaAs (aluminum gallium arsenide), and   a lower semiconductor layer includes Al GaAs.   
   
   
       11 . An apparatus as claimed in  claim 5 , wherein each thyristor includes six semiconductor layers in a doping profile given by p + -i-n-i-p-n + . 
   
   
       12 . An apparatus as claimed in  claim 5 , wherein each thyristor includes six semiconductor layers in a doping profile given by n + -i-p-i-n-p + . 
   
   
       13 . An apparatus for switching microwave signals, comprising:
 a plurality of thyristors, each thyristor including a plurality of semiconductor layers, a lower conducting surface and an upper conducting surface, and the semiconductor layers including at least one semi-insulating layer;   a substrate, the substrate having an upper surface on which the thyristors are disposed;   a lower metallization layer disposed on the upper surface of the substrate, the lower metallization layer being substantially planar and defining a plurality of input lines that are connected to lower conducting surfaces of the thyristors, each thyristor being connected to one of the input lines;   a dielectric layer disposed on the upper surface of the substrate; and   an upper metallization layer disposed on an upper surface of the dielectric layer, the upper metallization layer being substantially planar and defining a plurality of output lines that are connected to upper conducting surfaces of the thyristors, each thyristor being connected to one of the output lines.   
   
   
       14 . An apparatus as claimed in  claim 13 , wherein
 the semiconductor layers include GaAs, and   said at least one semi-insulating layer includes semi-insulating GaAs.   
   
   
       15 . An apparatus as claimed in  claim 13 , wherein
 the semiconductor layers include Si, and   said at least one semi-insulating layer includes intrinsic Si.   
   
   
       16 . An apparatus as claimed in  claim 13 , wherein
 each thyristor is configured as a mesa, and   said at least one semi-insulating layer includes a first semi-insulating layer and a second semi-insulating layer.   
   
   
       17 . An apparatus as claimed in  claim 13 , wherein
 the semiconductor layers include GaAs,   said at least one semi-insulating layer includes semi-insulating GaAs,   an upper semiconductor layer includes Al GaAs, and   a lower semiconductor layer includes Al GaAs.   
   
   
       18 . An apparatus as claimed in  claim 13 , wherein each thyristor includes six semiconductor layers in a doping profile given by p + -i-n-i-p-n + . 
   
   
       19 . An apparatus as claimed in  claim 13 , wherein each thyristor includes six semiconductor layers in a doping profile given by n + -i-p-i-n-p + . 
   
   
       20 . An apparatus as claimed in  claim 13 , wherein the dielectric layer includes an organic spacer material selected from the group consisting of polystyrene and benzocyclobutene. 
   
   
       21 . An apparatus as claimed in  claim 13 , further comprising:
 an upper dielectric layer disposed on the upper surface of the dielectric layer;   an upper ground plane disposed on an upper surface of the upper dielectric layer; and   a lower ground plane disposed on a lower surface of the substrate.   
   
   
       22 . An apparatus as claimed in  claim 21 , wherein
 the dielectric layer and the upper dielectric layer each include an organic spacer material selected from the group consisting of polystyrene and benzocyclobutene, and   the upper ground plane and the lower ground plane each include gold plating   
   
   
       23 . A method for making a microwave switch array, comprising:
 growing a plurality of semiconductor layers on an upper surface of a substrate, the semiconductor layers including at least one semi-insulating layer;   etching a plurality of thyristors in the semiconductor layers, each thyristor being configured as a mesa having an upper conducting surface and a lower conducting surface;   adding a lower metallization layer onto the upper surface of the substrate, the lower metallization layer defining a plurality of input lines that are connected to lower conducting surfaces of the thyristors, each thyristor being connected to one of the input lines;   adding a dielectric layer onto the upper surface of the substrate; and   adding an upper metallization layer onto an upper surface of the dielectric layer, the upper metallization layer defining a plurality of output lines that are connected to upper conducting surfaces of the thyristors, each thyristor being connected to one of the output lines.   
   
   
       24 . A method as claimed in  claim 23 , wherein
 the semiconductor layers include GaAs, and   said at least one semi-insulating layer includes semi-insulating GaAs.   
   
   
       25 . A method as claimed in  claim 23 , wherein
 the semiconductor layers include Si, and   said at least one semi-insulating layer includes intrinsic Si.   
   
   
       26 . A method as claimed in  claim 23 , wherein said at least one semi-insulating layer includes a first semi-insulating layer and a second semi-insulating layer. 
   
   
       27 . A method as claimed in  claim 23 , wherein
 the semiconductor layers include GaAs,   said at least one semi-insulating layer includes semi-insulating GaAs,   an upper semiconductor layer includes Al GaAs, and   a lower semiconductor layer includes Al GaAs.   
   
   
       28 . A method as claimed in  claim 23 , wherein each thyristor includes six semiconductor layers in a doping profile given by p + -i-n-i-p-n + . 
   
   
       29 . A method as claimed in  claim 23 , wherein each thyristor includes six semiconductor layers in a doping profile given by n + -i-p-i-n-p + . 
   
   
       30 . A method as claimed in  claim 23 , wherein the dielectric layer includes an organic spacer material selected from the group consisting of polystyrene and benzocyclobutene. 
   
   
       31 . A method as claimed in  claim 23 , further comprising:
 adding an upper dielectric layer onto the upper surface of the dielectric layer;   adding an upper ground plane onto an upper surface of the upper dielectric layer; and   adding a lower ground plane onto a lower surface of the substrate.   
   
   
       32 . A method as claimed in  claim 26 , wherein
 the dielectric layer and the upper dielectric layer each include an organic spacer material selected from the group consisting of polystyrene and benzocyclobutene, and   the upper ground plane and the lower ground plane each include gold plating   
   
   
       33 . An apparatus for switching optical signals, comprising:
 An optical-to-electrical converter, the optical-to-electrical converter operating to receive input optical signals and to generate incoming microwave signals corresponding thereto;   An input correction unit connected to the optical-to-electrical converter, the input correction unit including a combination of circuits selected from the group consisting of reshaping circuits, retiming circuits, error-correction circuits and leveling circuits, and the input correction unit operating to receive incoming microwave signals and to generate input microwave signals corresponding thereto;   a microwave switch array connected to the input correction unit, the microwave switch array including a plurality of input lines, a plurality of output lines, and a plurality of thyristors, each thyristor having a lower conducting surface that is electrically connected to one of the input lines and an upper conducting surface that is electrically connected to one of the output lines, and the microwave switch array operating to receive input microwave signals and to generate output microwave signals corresponding thereto;   An output correction unit connected to the microwave switch array; the output correction unit including a combination of circuits selected from the group consisting of reshaping circuits, retiming circuits, error-correction circuits and leveling circuits, and the output correction unit operating to receive output microwave signals and to generate outgoing microwave signals corresponding thereto; and   An electrical-to-optical converter connected to the output correction unit, the electrical-to-optical converter operating to receive outgoing microwave signals and to generate output optical signals corresponding thereto, wherein   a selected thyristor transmits a microwave signal between a selected input line and a selected output line in an ON state and blocks the microwave signal between the selected input line and the selected output line in an OFF state.   
   
   
       34 . An apparatus as claimed in  claim 33 , wherein
 the microwave switch array is configured as a permutation switch,   a combination of an input turn-on pulse along the selected input line and an output turn-on pulse along the selected output line switches the selected thyristor from the OFF state to the ON state while leaving other thyristors unswitched, and   a combination of an input turn-off pulse along the selected input line and an output turn-off pulse along the selected output line switches the selected thyristor from the ON state to the OFF state while leaving other thyristors unswitched.   
   
   
       35 . An apparatus as claimed in  claim 34 , further comprising
 a plurality of input pulse circuits connected to the input lines; and   a plurality of output pulse circuits connected to the output lines, wherein   the input-pulse circuits operate to generate input turn-on pulses and input turn-off pulses, and   the output-pulse circuits operate to generate output turn-on pulses and the output turn-off pulses.   
   
   
       36 . An apparatus as claimed in  claim 35 , wherein
 input turn-on pulses and output turn-on pulses are nearly equal in magnitude and opposite in polarity, and   input turn-off pulses and output turn-off pulses are nearly equal in magnitude and opposite in polarity.   
   
   
       37 . An apparatus as claimed in  claim 33 , wherein each thyristor includes a plurality of semiconductor layers disposed on a substrate, the semiconductor layers including at least one semi-insulating layer. 
   
   
       38 . An apparatus as claimed in  claim 37 , wherein
 the semiconductor layers include GaAs (gallium arsenide), and   said at least one semi-insulating layer includes semi-insulating GaAs.   
   
   
       39 . An apparatus as claimed in  claim 37 , wherein
 the semiconductor layers include Si (silicon), and   said at least one semi-insulating layer includes intrinsic Si.   
   
   
       40 . An apparatus as claimed in  claim 37 , wherein the frequency of the microwave signal is at least 1 GHz. 
   
   
       41 . An apparatus as claimed in  claim 37 , wherein
 each thyristor is configured as a mesa, and   said at least one semi-insulating layer includes a first semi-insulating layer and a second semi-insulating layer.   
   
   
       42 . An apparatus as claimed in  claim 37 , wherein
 the semiconductor layers include GaAs,   said at least one semi-insulating layer includes semi-insulating GaAs,   an upper semiconductor layer includes Al GaAs (aluminum gallium arsenide), and   a lower semiconductor layer includes Al GaAs.   
   
   
       43 . An apparatus as claimed in  claim 37 , wherein each thyristor includes six semiconductor layers in a doping profile given by p + -i-n-i-p-n + . 
   
   
       44 . An apparatus as claimed in  claim 37 , wherein each thyristor includes six semiconductor layers in a doping profile given by n + -i-p-i-n-p + .