Process for manufacturing a semiconductor device, a semiconductor device and a high-frequency circuit

Abstract

A process for manufacturing a semiconductor device, provides that a silicide layer is formed, an amorphous semiconductor layer is applied both to the silicide layer and to an open monocrystalline semiconductor region, adjacent to the silicide layer, and during a subsequent temperature treatment, the amorphous semiconductor layer is crystallized proceeding from the open, monocrystalline semiconductor region, acting as a crystallization nucleus, so that the silicide layer is covered at least partially by a crystallized, monocrystalline semiconductor layer.

1 . A semiconductor device comprising:
 a monocrystalline semiconductor layer; and   at least one suicide layer, the silicide layer being at least partially covered by the monocrystalline semiconductor layer, which is crystallized from an amorphous semiconductor material applied to the silicide layer proceeding from a monocrystalline semiconductor region as a crystallization nucleus.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein the monocrystalline semiconductor region forms a substantially flat surface with the silicide layer, at least in a region of crystallization. 
   
   
       3 . The semiconductor device according to  claim 1 , wherein a dielectric at least partially covers the silicide layer, and is adjacent to the crystallized monocrystalline semiconductor layer. 
   
   
       4 . The semiconductor device according to  claim 1 , further comprising a trench structure that is provided in an area along which the silicide layer is applied to the monocrystalline semiconductor region. 
   
   
       5 . The semiconductor device according to  claim 4 , wherein the trench structure is at least partially filled with the dielectric. 
   
   
       6 . The semiconductor device according to  claim 5 , wherein the dielectric is planarized. 
   
   
       7 . The semiconductor device according to  claim 1 , wherein the monocrystalline semiconductor layer is doped by dopants, which diffuse out of the silicide layer, which functions as a dopant source. 
   
   
       8 . The semiconductor device according to  claim 1 , wherein the semiconductor device is formed by the steps comprising:
 forming the silicide layer;   applying the amorphous semiconductor layer to the silicide layer and to the monocrystalline semiconductor region that is adjacent to the silicide layer; and   crystallizing, during a subsequent temperature treatment, the amorphous semiconductor layer proceeding from the open monocrystalline semiconductor region, which functions as a crystallization nucleus, so that the silicide layer is at least partially covered by a crystallized, monocrystalline semiconductor layer.   
   
   
       9 . A high-frequency circuit having a semiconductor device with at least one silicide layer, which connects electrically a buried, doped semiconductor layer of an active high-frequency component, whereby the silicide layer is covered at least partially with a monocrystalline semiconductor layer crystallized from an amorphous semiconductor material. 
   
   
       10 . The high-frequency circuit according to  claim 9 , wherein a dielectric, which fills the trench structure, is placed between a base connection and the silicide layer. 
   
   
       11 . The high-frequency circuit according to  claim 9 , wherein the semiconductor device is formed by the steps comprising:
 forming the silicide layer;   applying the amorphous semiconductor layer to the silicide layer and to the monocrystalline semiconductor region that is adjacent to the silicide layer; and   crystallizing, during a subsequent temperature treatment, the amorphous semiconductor layer proceeding from the open monocrystalline semiconductor region, which functions as a crystallization nucleus, so that the silicide layer is at least partially covered by a crystallized, monocrystalline semiconductor layer.