Capacitor in semiconductor device and manufacturing method

Abstract

The capacitor in a semiconductor device includes a substrate, a lower electrode formed over the substrate, a diffusion barrier formed over the lower electrode, a plurality of agglomerates formed over the diffusion barrier, a dielectric layer formed over the surface of the agglomerates to form an uneven surface, and an upper electrode formed over the dielectric layer.

1 . A capacitor comprising:
 a substrate;   a lower electrode formed over the substrate;   a diffusion barrier formed over the lower electrode;   a plurality of agglomerates formed over the diffusion barrier;   a dielectric layer covering the agglomerates and having an uneven surface due to the agglomerates; and   an upper electrode formed over the dielectric layer.   
   
   
       2 . The capacitor of  claim 1 , wherein the agglomerates comprise a low-melting-point metal. 
   
   
       3 . The capacitor of  claim 2 , wherein the low-melting-point metal comprises at least one of Sn or Zn. 
   
   
       4 . The capacitor of  claim 1 , wherein the dielectric layer comprises at least one of Si 3 N 4 , SiO 2 , Ta 2 O 5 , TiO 2 , PZT, PLZT, and BaTiO 3 . 
   
   
       5 . The capacitor of  claim 1 , wherein the diffusion barrier comprises Ru. 
   
   
       6 . The capacitor of  claim 1 , wherein the agglomerates have a spherical shape. 
   
   
       7 . The capacitor of  claim 1 , wherein a projected area of all of the agglomerates constitutes about 50˜60% of an area of the diffusion barrier. 
   
   
       8 . The capacitor of  claim 1 , wherein the diffusion barrier comprises RuO 2 . 
   
   
       9 . (canceled) 
   
   
       10 . (canceled) 
   
   
       11 . (canceled) 
   
   
       12 . (canceled) 
   
   
       13 . (canceled) 
   
   
       14 . (canceled) 
   
   
       15 . (canceled) 
   
   
       16 . (canceled) 
   
   
       17 . (canceled)