US2008163240A1PendingUtilityA1

Using Performance Monitor to Optimize System Performance

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Assignee: AGUILAR MAXIMINOPriority: Jun 21, 2006Filed: Mar 15, 2008Published: Jul 3, 2008
Est. expiryJun 21, 2026(expired)· nominal 20-yr term from priority
G06F 2201/86G06F 11/3409G06F 2209/483G06F 9/4881
45
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Claims

Abstract

An approach that optimizes system performance using performance monitors is presented. The system gathers thread performance data using performance monitors for threads running on either a first ISA processor or a second ISA processor. Multiple first processors and multiple second processors may be included in a single computer system. The first processors and second processors can each access data stored in a common shared memory. The gathered thread performance data is analyzed to determine whether the corresponding thread needs additional CPU time in order to optimize system performance. If additional CPU time is needed, the amount of CPU time that the thread receives is altered (increased) so that the thread receives the additional time when it is scheduled by the scheduler. In one embodiment, the increased CPU time is accomplished by altering a priority value that corresponds to the thread.

Claims

exact text as granted — not AI-modified
1 . A computer-implemented method comprising:
 gathering thread performance data corresponding to a first plurality of threads running on one or more first processors that are based on a first instruction set architecture (ISA);   gathering thread performance data corresponding to a second plurality of threads running on one or more second processors that are based on a second ISA, wherein the first processors and the second processors share a memory accessible from the first and second processors;   analyzing the thread performance data gathered for the first and second plurality of threads; and   based on the analysis, adjusting an amount of CPU time allocated to at least one of the threads included in the first and second plurality of threads.   
   
   
       2 . The method of  claim 1  wherein adjusting the amount of CPU time includes modifying a priority value. 
   
   
       3 . The method of  claim 1  further comprising:
 receiving performance selections from a user; and   storing the received performance selections in a storage area, wherein the performance data gathered corresponds to the received performance selections.   
   
   
       4 . The method of  claim 3  further comprising:
 selecting the one or more first processors and the one or more second processors based upon the received performance selections, wherein thread performance data is only gathered for threads running on the selected first and second processors.   
   
   
       5 . The method of  claim 3  wherein the analyzing further comprises:
 comparing the gathered thread performance data to one or more thresholds included in the received performance selections.   
   
   
       6 . The method of  claim 1  further comprising:
 scheduling the first and second plurality of threads using a common scheduler that reads the gathered thread performance data from the shared memory.   
   
   
       7 . The method of  claim 1  wherein a common scheduler schedules the first and second plurality of threads, the method further comprising:
 storing the gathered thread performance data in the shared memory;   retrieving CPU thread utilization thresholds corresponding to at least one of the first processors and to at least one of the second processors; and   comparing the retrieved CPU thread utilization thresholds with current CPU utilizations that correspond to the retrieved CPU thread utilization thresholds, wherein the analyzing and adjusting is only performed for those processors with current CPU utilizations that are below the retrieved CPU thread utilization thresholds.   
   
   
       8 . An information handling system comprising:
 a plurality of heterogeneous processors, wherein the plurality of heterogeneous processors includes one or more first processors that are based on a first instruction set architecture (ISA) and a one or more second processors that are based on a second instruction set architecture (ISA);   a local memory corresponding to each of the plurality of heterogeneous processors;   a shared memory accessible by the heterogeneous processors; and   a set of instructions stored in one of the local memories, wherein one or more of the heterogeneous processors executes the set of instructions in order to perform actions of:
 gathering thread performance data corresponding to a first plurality of threads running on the first processors; 
 gathering thread performance data corresponding to a second plurality of threads running on the second processors; 
 analyzing the thread performance data gathered for the first and second plurality of threads; and 
 based on the analysis, adjusting an amount of CPU time allocated to at least one of the threads included in the first and second plurality of threads. 
   
   
   
       9 . The information handling system of  claim 8  further comprising instructions that perform the actions of:
 receiving performance selections from a user; and   storing the received performance selections in a storage area, wherein the performance data gathered corresponds to the received performance selections.   
   
   
       10 . The information handling system of  claim 8  further comprising instructions that perform the actions of:
 selecting the one or more first processors and the one or more second processors based upon the received performance selections, wherein thread performance data is only gathered for threads running on the selected first and second processors.   
   
   
       11 . The information handling system of  claim 8  wherein the analyzing further comprises instructions that perform the actions of:
 comparing the gathered thread performance data to one or more thresholds included in the received performance selections.   
   
   
       12 . The information handling system of  claim 8  further comprising instructions that perform the actions of: scheduling the first and second plurality of threads using a common scheduler that reads the gathered thread performance data from the shared memory. 
   
   
       13 . The information handling system of  claim 8  wherein a common scheduler schedules the first and second plurality of threads, the information handling system further comprising instructions that perform the actions of:
 storing the gathered thread performance data in the shared memory;   retrieving CPU thread utilization thresholds corresponding to at least one of the first processors and to at least one of the second processors; and   comparing the retrieved CPU thread utilization thresholds with current CPU utilizations that correspond to the retrieved CPU thread utilization thresholds, wherein the analyzing and adjusting is only performed for those processors with current CPU utilizations that are below the retrieved CPU thread utilization thresholds.   
   
   
       14 . A computer program product stored in a computer readable medium, comprising functional descriptive material that, when executed by a data processing system, causes the data processing system to perform actions that include:
 gathering thread performance data corresponding to a first plurality of threads running on one or more first processors that are based on a first instruction set architecture (ISA);   gathering thread performance data corresponding to a second plurality of threads running on one or more second processors that are based on a second ISA, wherein the first processors and the second processors share a memory accessible from the first and second processors;   analyzing the thread performance data gathered for the first and second plurality of threads; and   based on the analysis, adjusting an amount of CPU time allocated to at least one of the threads included in the first and second plurality of threads.   
   
   
       15 . The computer program product of  claim 14  wherein adjusting the amount of CPU time includes modifying a priority value. 
   
   
       16 . The computer program product of  claim 14  further comprising functional descriptive material that, when executed by the data processing system, causes the data processing system to perform actions that include:
 receiving performance selections from a user; and   storing the received performance selections in a storage area, wherein the performance data gathered corresponds to the received performance selections.   
   
   
       17 . The computer program product of  claim 16  further comprising functional descriptive material that, when executed by the data processing system, causes the data processing system to perform actions that include:
 selecting the one or more first processors and the one or more second processors based upon the received performance selections, wherein thread performance data is only gathered for threads running on the selected first and second processors.   
   
   
       18 . The computer program product of  claim 16  further comprising functional descriptive material that, when executed by the data processing system, causes the data processing system to perform actions that include:
 comparing the gathered thread performance data to one or more thresholds included in the received performance selections.   
   
   
       19 . The computer program product of  claim 14  further comprising functional descriptive material that, when executed by the data processing system, causes the data processing system to perform actions that include:
 scheduling the first and second plurality of threads using a common scheduler that reads the gathered thread performance data from the shared memory.   
   
   
       20 . The computer program product of  claim 14  further comprising functional descriptive material that, when executed by the data processing system, causes the data processing system to perform actions that include a common scheduler that schedules the first and second plurality of threads based on actions that include: storing the gathered thread performance data in the shared memory;
 retrieving CPU thread utilization thresholds corresponding to at least one of the first processors and to at least one of the second processors; and   comparing the retrieved CPU thread utilization thresholds with current CPU utilizations that correspond to the retrieved CPU thread utilization thresholds, wherein the analyzing and adjusting is only performed for those processors with current CPU utilizations that are below the retrieved CPU thread utilization thresholds.

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