US2008173957A1PendingUtilityA1

Method of forming a semiconductor device having a symmetric dielectric regions and structure thereof

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Assignee: FREESCALE SEMICONDUCTOR INCPriority: Mar 29, 2005Filed: Aug 31, 2007Published: Jul 24, 2008
Est. expiryMar 29, 2025(expired)· nominal 20-yr term from priority
H10P 30/222H10P 30/208H10P 30/204H10D 64/021H10D 30/0212H10D 30/62H10D 62/371H10D 30/6717H10D 30/603H10D 30/0221Y10S438/981
51
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Claims

Abstract

A method for forming a semiconductor device including forming a semiconductor substrate; forming a gate electrode over the semiconductor substrate having a first side and a second side, and forming a gate dielectric under the gate electrode. The gate dielectric has a first area under the gate electrode and adjacent the first side of the gate electrode, a second area under the gate electrode and adjacent the second side of the gate electrode, and a third area under the gate electrode that is between the first area and the second area, wherein the first area is thinner than the second area, and the third area is thinner than the first area and is thinner than the second area.

Claims

exact text as granted — not AI-modified
1 - 18 . (canceled) 
     
     
         19 . A semiconductor device comprising:
 a semiconductor substrate;   a gate electrode over the semiconductor substrate having a first side and a second side; and   a gate dielectric under the gate electrode, wherein the gate dielectric has a first area under the gate electrode and adjacent the first side of the gate electrode; a   second area under the gate electrode and adjacent the second side of the gate electrode; and a third area under the gate electrode that is between the first area and the second area; wherein the first area is thinner than the second area, and the third arearea is thinner than the first area and is thinner than the second area.   
     
     
         20 . The semiconductor device of  claim 19 , wherein the first side of the gate electrode comprises a first dielectric and second side comprises a second dielectric, wherein the second dielectric is thicker than the first dielectric. 
     
     
         21 . The semiconductor device of  claim 19 , further comprising:
 a source extension region; and   a drain extension region, wherein the source extension region is deeper than the drain extension region.   
     
     
         22 . The semiconductor device of  claim 19  further comprising:
 a first spacer adjacent the first side of the gate electrode, and   a second space adjacent the second side of the gate electrode.   
     
     
         23 . A semiconductor device compromising:
 a semiconductor substrate;   a gate electrode over the semiconductor substrate having a first side and a second side; and   a gate dielectric under the gate electrode, wherein the gate dielectric is thicker near the first side of the gate electrode than near the second side of the gate electrode.   
     
     
         24 . The semiconductor device of  claim 23 , further comprising:
 a source extension region; and   a drain extension region, wherein the source extension region is deeper than the drain extension region.   
     
     
         25 . A method of forming a semiconductor device, the method comprising:
 forming a gate electrode over a semiconductor substrate, wherein the gate electrode has a first side of a second side;   implanting a species into the semiconductor substrate and only adjacent the first side; and   oxidizing the semiconductor substrate after the implantings.   
     
     
         26 . The method of  claim 25 , wherein the implanting further comprises implanting an oxidation enhancing species. 
     
     
         27 . The method of  claim 25 , wherein the implanting further comprises implanting an oxidation reduction species. 
     
     
         28 . The method of  claim 22 , wherein the implanting is performed at a tilt.

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