US2008190659A1PendingUtilityA1

System For And Method Of Planarizing The Contact Region Of A Via By Use Of A Continuous Inline Vacuum Deposition Process

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Assignee: ADVANTECH GLOBAL LTDPriority: Dec 23, 2004Filed: Apr 16, 2008Published: Aug 14, 2008
Est. expiryDec 23, 2024(expired)· nominal 20-yr term from priority
H10P 72/0448H10P 72/0468H10P 72/0456H05K 3/467H05K 1/0393H05K 3/143H05K 3/4076H05K 2201/0179H05K 2203/1545
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Claims

Abstract

A multi-layer electronic device can be formed to include an insulative substrate ( 212 ), a first vapor deposited conductor layer ( 312 ) on the insulative substrate ( 212 ), a first vapor deposited insulator layer ( 314 ) on the first conductor layer ( 312 ), the first insulator layer ( 314 ) having at least one via hole ( 316 ) therein, and a vapor deposited conductive filler ( 320 ) in the via hole ( 316 ) of the first insulator layer ( 314 ). Desirably, the conductive filler ( 320 ) is deposited in the via hole ( 316 ) of the first insulator layer ( 314 ) such that the surface of the conductive filler ( 320 ) opposite the first conductor layer ( 312 ) is substantially planar with the surface of the first insulator layer ( 314 ) opposite the first conductor layer ( 312 ).

Claims

exact text as granted — not AI-modified
1 . A multi-layer electronic device comprising:
 an insulative substrate ( 212 );   a first vapor deposited conductor layer ( 312 ) on the insulative substrate ( 212 );   a first vapor deposited insulator layer ( 314 ) on the first conductor layer ( 312 ), the first insulator layer ( 314 ) having at least one via hole ( 316 ) therein; and   a vapor deposited conductive filler ( 320 ) in the via hole ( 316 ) of the first insulator layer ( 314 ).   
     
     
         2 . The device of  claim 1 , wherein the conductive filler ( 320 ) is deposited in the via hole ( 316 ) of the first insulator layer ( 314 ) such that the surface of the conductive filler ( 320 ) opposite the first conductor layer ( 312 ) is substantially planar with the surface of the first insulator layer ( 314 ) opposite the first conductor layer ( 312 ). 
     
     
         3 . The device of  claim 2 , further including a vapor deposited second conductor layer ( 318 ) on the first insulator layer ( 314 ). 
     
     
         4 . The device of  claim 3 , wherein the second conductor layer ( 318 ) either is deposited on the conductive filler ( 320 ) in the via hole ( 316 ) of the first insulator layer ( 314 ) or has at least one via hole ( 316 ) therein in alignment with the via hole ( 316 ) in the first insulator layer ( 314 ). 
     
     
         5 . The device of  claim 4 , further including a vapor deposited second insulator layer ( 410 ) on the second conductor layer ( 318 ), the second insulator layer ( 410 ) having at least one via hole ( 316 ) therein in alignment with the via hole ( 316 ) of the second conductor layer ( 318 ), wherein the conductive filler ( 320 ) is deposited into the via holes of the first insulator layer ( 314 ), the second conductor layer ( 318 ) and the second insulator layer ( 410 ) in one of a single deposition step and plural deposition steps. 
     
     
         6 . The device of  claim 5 , further including a vapor deposited third conductor layer ( 412 ) on the second insulator layer ( 410 ) and on the conductive filler ( 320 ) in the via hole of the second insulator layer ( 410 ). 
     
     
         7 . The device of  claim 4 , wherein via holes in adjacent layers are in alignment when at least part of one of the aligned via holes is visible by way of the other of the aligned via holes.

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