Semiconductor devices and methods of manufacturing the same

Abstract

Semiconductor devices and methods of manufacturing the same are disclosed. A disclosed semiconductor device comprises a semiconductor substrate; a gate formed on the semiconductor substrate; a gate oxide layer interposed between the semiconductor substrate and the gate; and source and drain regions formed within the substrate at opposite sides of the gate. The gate oxide layer has a first region with a first thickness and a second region with a second thickness. The second thickness is thicker than the first thickness.

1 . A semiconductor device comprising:
 a semiconductor substrate;   a gate on the semiconductor substrate;   a gate oxide layer between the semiconductor substrate and the gate, the gate oxide layer having a first region with a first thickness and a second region with a second thickness greater than the first thickness; and   source and drain regions in the substrate at opposite sides of the gate.   
   
   
       2 . A semiconductor device as defined in  claim 1 , wherein the source region is near the first region and the drain region is near the second region. 
   
   
       3 . A semiconductor device as defined in  claim 1 , wherein a boundary between the first and second regions is closer to the source region. 
   
   
       4 . A semiconductor device as defined in  claim 3 , wherein the boundary enables a greater gate driving voltage. 
   
   
       5 . A semiconductor device as defined in  claim 3 , wherein the boundary enables a greater drain voltage. 
   
   
       6 . A semiconductor device as defined in  claim 1 , wherein the gate material layer comprises polysilicon. 
   
   
       7 . A semiconductor device as defined in  claim 1 , wherein a boundary between the first and second regions has a tapered profile. 
   
   
       8 . A semiconductor device as defined in  claim 3 , wherein the boundary between the first and second regions has a tapered profile. 
   
   
       9 . A semiconductor device comprising:
 a semiconductor substrate;   a gate oxide layer having a first region with a first thickness and a second region with a second thickness, the second thickness is thicker than the first thickness;   a gate above the first and second regions of the gate oxide layer;   source located adjacent the first region; and   a drain located adjacent the second region.   
   
   
       10 . A semiconductor device as defined in  claim 9 , wherein a boundary between the first and second regions is closer to the source region. 
   
   
       11 . A semiconductor device as defined in  claim 10 , wherein the boundary enables a greater gate driving voltage. 
   
   
       12 . A semiconductor device as defined in  claim 10 , wherein the boundary enables a greater drain voltage. 
   
   
       13 . A semiconductor device as defined in  claim 9 , wherein the gate material layer comprises polysilicon. 
   
   
       14 . A semiconductor device as defined in  claim 9 , wherein a boundary between the first and second regions has a tapered profile. 
   
   
       15 . A semiconductor device as defined in  claim 10 , wherein the boundary between the first and second regions has a tapered profile.