US2008203451A1PendingUtilityA1
CMOS image sensor and method for fabricating the same
Est. expiryDec 30, 2024(expired)· nominal 20-yr term from priority
Inventors:Chang Hun Han
H10F 39/8063H10F 39/8053H10F 39/026H10F 39/802H10F 30/20H10F 39/803H10F 39/12
56
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Claims
Abstract
A CMOS image sensor and a method for fabricating the same are provided, in which an N type region of a photodiode is prevented from adjoining a device isolation film and a dark current is reduced. The CMOS image sensor includes an interlayer dielectric film formed between a gate poly and a power line, a contact formed in the interlayer dielectric film, and an epitaxial layer connected with the contact and formed only in a blue photodiode region.
Claims
exact text as granted — not AI-modified1 . A CMOS image sensor comprising:
a first conductive type semiconductor substrate defined by a photodiode area and a transistor area; a second conductive type impurity ion area formed in the semiconductor substrate of the photodiode area; a gate electrode formed on the semiconductor substrate of the transistor area; an insulating film formed on an entire surface of the semiconductor substrate including the gate electrode and excluding the second conductive type impurity ion area; and a silicon epitaxial layer formed on the second conductive type impurity ion area and doped with first conductive type impurity ions.
2 . The CMOS image sensor of claim 1 , wherein the silicon epitaxial layer is formed on the second conductive type impurity ion area using a selective epitaxial growth process.
3 . The CMOS image sensor of claim 1 , wherein the gate electrode is isolated from the silicon epitaxial layer by the insulating film formed at sidewalls of the gate electrode.
4 . The CMOS image sensor of claim 1 , further comprising spacers formed at sidewalls of the gate electrode.
5 . The CMOS image sensor of claim 4 , wherein the spacers formed at the sidewalls of the gate electrode are adjacent to the silicon epitaxial layer and are formed on the silicon epitaxial layer at the sidewalls of the gate electrode.
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