US2008231738A1PendingUtilityA1

Image sensor, single-plate color image sensor, and electronic device

Assignee: TOSHIBA KKPriority: Mar 22, 2007Filed: Mar 17, 2008Published: Sep 25, 2008
Est. expiryMar 22, 2027(~0.6 yrs left)· nominal 20-yr term from priority
Inventors:Yoshinori Iida
H10F 77/14H10F 39/8033H10F 39/802H10F 39/182
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Claims

Abstract

An image sensor includes an imaging area including a plurality of cells arrayed in a matrix on a semiconductor substrate, each of the cells including an avalanche photodiode, the avalanche photodiode including: an anode region buried in an upper portion of the semiconductor substrate; a cathode region buried in the upper portion of the semiconductor substrate separated from the anode region in a direction parallel to the surface of the semiconductor substrate; and an avalanche multiplication region defined between the anode and cathode regions, the avalanche multiplication region having an impurity concentration less than the anode and cathode regions; wherein depths of the anode and cathode regions from the surface of the semiconductor substrate are different from each other.

Claims

exact text as granted — not AI-modified
1 . An image sensor, comprising:
 an imaging area including a plurality of cells arrayed in a matrix on a semiconductor substrate, each of the cells including an avalanche photodiode, the avalanche photodiode including:
 an anode region buried in an upper portion of the semiconductor substrate; 
 a cathode region buried in the upper portion of the semiconductor substrate separated from the anode region in a direction parallel to the surface of the semiconductor substrate; and 
   an avalanche multiplication region defined between the anode and cathode regions, the avalanche multiplication region having an impurity concentration less than the anode and cathode regions;
 wherein depths of the anode and cathode regions from the surface of the semiconductor substrate are different from each other. 
   
   
   
       2 . The image sensor of  claim 1 , wherein the depth of the cathode region is deeper than the anode region. 
   
   
       3 . The image sensor of  claim 1 , each of the cells further comprising:
 an insulated-gate field effect transistor having a source region and a drain region, the source region electrically connected to the cathode region, the insulated-gate field effect transistor configured to transfer a signal charge generated by an incident light on a surface of the avalanche multiplication region to a sensing portion connected to the drain region.   
   
   
       4 . The image sensor of  claim 1 , wherein the semiconductor substrate includes,
 an automatic gain control circuit configured to adjust a gain of an analog signal converted from a signal charge, the signal charge generated by an incident light on a surface of the avalanche multiplication region;   an analog-digital converter configured to convert the adjusted gain analog signal, to a digital signal; and   a timing generator configured to generate a clock signal synchronizing a timing of the automatic gain control circuit and the analog-digital converter to select a target cell among the cells.   
   
   
       5 . A single-plate color image sensor, comprising:
 an imaging area including a plurality of cells arrayed in a matrix on a semiconductor substrate, each of the cells including first to third avalanche photodiodes, each of the first to third avalanche photodiodes respectively including:
 first to third anode regions buried in an upper portion of the semiconductor substrate; 
 first to third cathode regions buried in the upper portion of the semiconductor substrate separated from each of the first to third anode regions in a direction parallel to the surface of the semiconductor substrate; and 
 first to third avalanche multiplication regions defined between each of the first to third anode regions and each of the first to third cathode regions, each of the first to third avalanche multiplication regions having an impurity concentration less than each of the first to third anode and each of the first to third cathode regions; 
 wherein, for at least one of the first to third avalanche photodiodes, depths of each of the first to third anode regions and each of the first to third cathode regions from the surface of the semiconductor substrate are different from each other. 
   
   
   
       6 . The color image sensor of  claim 5 , wherein the depth of the first to third cathode regions are deeper than the first to third anode regions, respectively. 
   
   
       7 . The color image sensor of  claim 6 , wherein the depth of the first anode region is in a range of about 0.1 μm and about 0.3 μm, the depth of the second anode region is in a range of about 0.3 μm and about 1 μm, and the depth of the third anode region is in a range of about 1 μm and about 10 μm. 
   
   
       8 . The color image sensor of  claim 6 , wherein the depth of the first anode region is in a range of about 0.1 μm and about 0.3 μm, the depth of the second anode region is in a range of about 0.3 μm and about 1.5 μm, and the depth of the third anode region is in a range of about 1.5 μm and about 5 μm. 
   
   
       9 . The color image sensor of  claim 5 , each of the cells further comprising:
 first to third insulated-gate field effect transistors having first to third source regions and first to third drain regions, the first to third source regions electrically connected to the first to third cathode regions, respectively, each of the first to third insulated-gate field effect transistors configured to transfer a signal charge generated by an incident light on each surface of the first to third avalanche multiplication regions to the first to third drain regions, respectively.   
   
   
       10 . The color image sensor of  claim 5 , wherein the semiconductor substrate includes,
 an automatic gain control circuit configured to adjust a gain of an analog signal converted from a signal charge, the signal charge generated by an incident light on a surface of the avalanche multiplication region;   an analog-digital converter configured to convert the adjusted gain analog signal to a digital signal; and   a timing generator configured to generate a clock signal synchronizing a timing of the automatic gain control circuit and the analog-digital converter to select a target cell among the cells.   
   
   
       11 . An electronic device having a camera module in which an image sensor is installed, the image sensor comprising:
 an imaging area including a plurality of cells arrayed in a matrix on a semiconductor substrate, each of the cells including an avalanche photodiode, the avalanche photodiode including:
 an anode region buried in an upper portion of the semiconductor substrate; 
 a cathode region buried in the upper portion of the semiconductor substrate separated from the anode region in a direction parallel to the surface of the semiconductor substrate; and 
 an avalanche multiplication region defined between the anode and cathode regions, the avalanche multiplication region having an impurity concentration less than the anode and cathode regions; 
 wherein depths of the anode and cathode regions from the surface of the semiconductor substrate are different from each other. 
   
   
   
       12 . The electronic device of  claim 11 , wherein the depth of the cathode region is deeper than the anode region. 
   
   
       13 . The electronic device of  claim 11 , each of the cells further comprising:
 an insulated-gate field effect transistor having a source region and a drain region, the source region electrically connected to the cathode region, the insulated-gate field effect transistor configured to transfer a signal charge generated by an incident light on a surface of the avalanche multiplication region to the drain region.   
   
   
       14 . The electronic device of  claim 11 , wherein the semiconductor substrate includes,
 an automatic gain control circuit configured to adjust a gain of an analog signal converted from a signal charge, the signal charge generated by an incident light on a surface of the avalanche multiplication region;   an analog-digital converter configured to convert the adjusted gain analog signal to a digital signal; and   a timing generator configured to generate a clock signal synchronizing a timing of the automatic gain control circuit and the analog-digital converter to select a target cell among the cells.   
   
   
       15 . An electronic device having a camera module in which a single-plate color image sensor is installed, the single-plate color image sensor comprising:
 an imaging area including a plurality of cells arrayed in a matrix on a semiconductor substrate, each of the cells including first to third avalanche photodiodes, each of the first to third avalanche photodiodes respectively including:
 first to third anode regions buried in an upper portion of the semiconductor substrate; 
 first to third cathode regions buried in the upper portion of the semiconductor substrate separated from each of the first to third anode regions in a direction parallel to the surface of the semiconductor substrate; and 
 first to third avalanche multiplication regions defined between each of the first to third anode regions and each of the first to third cathode regions, each of the first to third avalanche multiplication regions having an impurity concentration less than each of the first to third anode and each of the first to third cathode regions; 
 wherein, for at least one of the first to third avalanche photodiodes, depths of each of the first to third anode regions and each of the first to third cathode regions from the surface of the semiconductor substrate are different from each other. 
   
   
   
       16 . The electronic device of  claim 15 , wherein the depth of the first to third cathode regions are deeper than the first to third anode regions, respectively. 
   
   
       17 . The electronic device of  claim 16 , wherein the depth of the first anode region is in a range of about 0.1 μm and about 0.3 μm, the depth of the second anode region is in a range of about 0.3 μm and about 1 μm, and the depth of the third anode region is in a range of about 1 μm and about 10 μm. 
   
   
       18 . The electronic device of  claim 16 , wherein the depth of the first anode region is in a range of about 0.1 μm and about 0.3 μm, the depth of the second anode region is in a range of about 0.3 μm and about 1.5 μm, and the depth of the third anode region is in a range of about 1.5 μm and about 5 μm. 
   
   
       19 . The electronic device of  claim 15 , each of the cells further comprising:
 first to third insulated-gate field effect transistors having first to third source regions and first to third drain regions, the first to third source regions electrically connected to the first to third cathode regions, respectively, each of the first to third insulated-gate field effect transistors configured to transfer a signal charge, generated by an incident light on each surface of the first to third avalanche multiplication regions, to the first to third drain regions, respectively.   
   
   
       20 . The electronic device of  claim 15 , wherein the semiconductor substrate includes,
 an automatic gain control circuit configured to adjust a gain of an analog signal converted from a signal charge, the signal charge generated by an incident light on a surface of the avalanche multiplication region;   an analog-digital converter configured to convert the analog signal adjusted the gain, to a digital signal; and   a timing generator configured to generate a clock signal synchronizing a timing of the automatic gain control circuit and the analog-digital converter to select a target cell among the cells.

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