US2008252634A1PendingUtilityA1

Integrated circuit device and electronic instrument

39
Assignee: SEIKO EPSON CORPPriority: Apr 12, 2007Filed: Apr 9, 2008Published: Oct 16, 2008
Est. expiryApr 12, 2027(~0.7 yrs left)· nominal 20-yr term from priority
H03K 19/00315
39
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Claims

Abstract

An integrated circuit device includes a first circuit block that includes low-voltage transistors (LVTr) and operates using a first high-potential power supply voltage and a first low-potential power supply voltage, a second circuit block that includes low-voltage transistors (LVTr) and operates using a second high-potential power supply voltage and a second low-potential power supply voltage that differ in power supply system from the first circuit block, and an interface circuit (I/O buffer) provided between the first circuit block and the second circuit block. The interface circuit (I/O buffer) includes medium-voltage transistors (MVTr: transistors of which the thickness of the gate insulating film is larger than that of the low-voltage transistors (LVTr)). An electrostatic discharge protection circuit formed of bidirectional diodes is provided between a first and second low-potential power supply nodes.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit device comprising:
 a first circuit block;   a second circuit block that operates using a power supply system differing from that of the first circuit block; and   an interface circuit provided between the first circuit block and the second circuit block,   gate insulating films of some or all of a plurality of insulated gate transistors that form the interface circuit having a thickness larger than a thickness of a gate insulating film of at least one insulated gate transistor included in at least one of the first circuit block and the second circuit block.   
   
   
       2 . The integrated circuit device as defined in  claim 1 ,
 the interface circuit including at least one of a first buffer circuit and a second buffer circuit;   the first buffer circuit including a first output buffer that buffers a signal from the first circuit block and outputs the buffered signal to a first signal path, and a first input buffer that buffers a signal transmitted from the first output buffer through the first signal path and supplies the buffered signal to the second circuit block;   the second buffer circuit including a second output buffer that buffers a signal from the second circuit block and outputs the buffered signal to a second signal path, and a second input buffer that buffers a signal transmitted from the second output buffer through the second signal path and supplies the buffered signal to the first circuit block;   the first output buffer and the second input buffer operating at a power supply voltage of the first circuit block;   the first input buffer and the second output buffer operating at a power supply voltage of the second circuit block; and   gate insulating films of insulated gate transistors that form the first input buffer and the second input buffer having a thickness larger than a thickness of a gate insulating film of at least one insulated gate transistor that forms at least one of the first circuit block and the second circuit block.   
   
   
       3 . The integrated circuit device as defined in  claim 2 ,
 gate insulating films of insulated gate transistors that form the first output buffer and the second output buffer having a thickness larger than a thickness of a gate insulating film of at least one insulated gate transistor that forms at least one of the first circuit block and the second circuit block.   
   
   
       4 . The integrated circuit device as defined in  claim 1 ,
 the first circuit block operating using a first high-potential power supply and a first low-potential power supply; the second circuit block operating using a second high-potential power supply and a second low-potential power supply; and an electrostatic discharge protection circuit for noise blocking and electrostatic discharge protection being provided between a power supply node connected to the first low-potential power supply and a power supply node connected to the second low-potential power supply.   
   
   
       5 . The integrated circuit device as defined in  claim 4 ,
 the electrostatic discharge protection circuit including bidirectional diodes, the bidirectional diodes being formed by connecting at least one first diode and at least one second diode in parallel, a forward direction of the at least one first diode being a direction from the first low-potential power supply to the second low-potential power supply, and a forward direction of the at least one second diode being a direction from the second low-potential power supply to the first low-potential power supply.   
   
   
       6 . The integrated circuit device as defined in  claim 4 ,
 the integrated circuit device further including: a first inter-power-supply protection element provided between a power supply node connected to the first high-potential power supply and a power supply node connected to the first low-potential power supply; and a second inter-power-supply protection element provided between a power supply node connected to the second high-potential power supply and a power supply node connected to the second low-potential power supply.   
   
   
       7 . The integrated circuit device as defined in  claim 1 ,
 the first circuit block being a high-speed interface circuit that transfers data through a serial bus; and   the high-speed interface circuit including a physical layer circuit that includes an analog circuit, and a logic circuit.   
   
   
       8 . The integrated circuit device as defined in  claim 1 ,
 the second circuit block being a driver logic circuit that generates a display control signal for driving a display device.   
   
   
       9 . The integrated circuit device as defined in  claim 1 ,
 channel regions of the gate insulating films of the interface circuit that have a thickness larger than the thickness of the gate insulating films of the insulated gate transistors of the first circuit block and the second circuit block being subjected to a doping process that reduces a threshold value.   
   
   
       10 . The integrated circuit device as defined in  claim 1 ,
 the integrated circuit device including a low-voltage circuit region, a medium-voltage circuit region having a breakdown voltage higher than that of the low-voltage circuit region, and a high-voltage circuit region having a breakdown voltage higher than that of the medium-voltage circuit region;   at least part of the first circuit block being formed in the low-voltage circuit region;   at least part of the second circuit block being formed in the low-voltage circuit region; and   the first input buffer and the second input buffer of the interface circuit being formed in the medium-voltage circuit region.   
   
   
       11 . The integrated circuit device as defined in  claim 10 ,
 the integrated circuit device further including a data line driver block that drives a data line of the display device, the data line driver block being formed in the medium-voltage circuit region.   
   
   
       12 . The integrated circuit device as defined in  claim 10 ,
 the integrated circuit device further including a scan line driver block that drives a scan line of a display device, the scan line driver block being formed in the high-voltage circuit region.   
   
   
       13 . The integrated circuit device as defined in  claim 10 ,
 the integrated circuit device including:   a power supply circuit block formed in the high-voltage circuit region and the medium-voltage circuit region; and   a grayscale voltage generation circuit formed in the medium-voltage circuit region.   
   
   
       14 . The integrated circuit device as defined in  claim 1 ,
 a first-conductivity-type transistor that forms the first circuit block being formed in a second-conductivity-type well;   a second-conductivity-type transistor that forms the first circuit block being formed in a first first-conductivity-type well, the first first-conductivity-type well being formed in a second-conductivity-type substrate to enclose the second-conductivity-type well;   a first-conductivity-type transistor that forms the second circuit block being formed in the second-conductivity-type substrate; and   a second-conductivity-type transistor that forms the second circuit block being formed in a second first-conductivity-type well that differs from the first first-conductivity-type well for the first circuit block.   
   
   
       15 . An electronic instrument comprising:
 the integrated circuit device as defined in  claim 1 ; and   a display device driven by the integrated circuit device.

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