Self-Test System

Abstract

An electronic system comprising a system to be monitored ( 2 ) and a plurality of fault-monitoring systems ( 4, 6 ) each of which is adapted to output a fault signal when an input indicates that the electronic system is in a fault condition associated with the fault-monitoring system. The fault-monitoring systems are arranged in a cascade fashion such that a fault signal output from one fault-monitoring system ( 4 ) is provided as an input to a subsequent fault-monitoring system ( 6 ) in the cascade of fault-monitoring systems to simulate a fault condition associated with the subsequent fault-monitoring system. The output of the final fault-monitoring system in the cascade gives an indication of whether there is a fault with any of the fault-monitoring systems.

1 - 18 . (canceled) 
   
   
       19 . An electronic system comprising at least one fault-monitoring system, the electronic system being arranged to:
 place the electronic system into a first fault condition and monitor for a generation of a first fault signal from a first fault-monitoring device,   on the generation of a first fault signal from the first fault-monitoring device after placing the electronic system into a first fault condition, store a record to this effect in non-volatile memory,   on subsequent reversion of the electronic system to a non-fault condition, check whether the non-volatile memory includes a record of a first fault signal and when the non-volatile memory does not include a record of such a first fault signal on subsequent reversion, generate an alarm signal.   
   
   
       20 . An electronic system according to  claim 19  wherein:
 placing of the electronic system into a first fault condition comprises stopping operation of a processor; and   subsequent reversion of the electronic system to a non-fault condition comprises subsequent commencement of operation of the processor.   
   
   
       21 . An electronic system according to  claim 19  wherein the fault monitoring device comprises a voltage detector which generates a fault signal when an over-voltage occurs. 
   
   
       22 . An electronic system according to  claim 19  wherein the fault-monitoring device comprises a device for monitoring the operation of a processor and generating a fault signal when a fault with the operation of the processor is detected. 
   
   
       23 . An electronic system according to any of  claims 19  further arranged to clear the non-volatile memory of the record once it has been determined whether or not the non-volatile memory includes a record of a fault signal. 
   
   
       24 . An electronic system according to any of  claims 19  further comprising a plurality of fault-monitoring systems, a fault signal output of a first fault-monitoring system being provided as an input to a second fault-monitoring system, such that an input to the second fault-monitoring system simulates a second fault condition. 
   
   
       25 . An electronic system according to  claim 24  wherein the output of a final fault-monitoring system is used as an indicator of an overall fault in one of the fault-monitoring systems. 
   
   
       26 . A self-test method for an electronic system, the method comprising:
 placing the electronic system into a first fault condition and monitoring for a generation of a first fault signal from a fault-monitoring device,   on the generation of a first fault signal from the fault-monitoring device after placing the electronic system into a first fault condition, storing a record to this effect in non-volatile memory,   on subsequent reversion of the electronic system to a non-fault condition, checking whether the non-volatile memory includes a record of a first fault signal and when the non-volatile memory does not include a record of such a first fault signal on subsequent commencement, generating an alarm signal.   
   
   
       27 . A self-test method according to  claim 26  wherein the electronic system includes a processor, wherein:
 the placing of the electronic system into a first fault condition comprises stopping operation of the processor; and   subsequent reversion of the electronic system to a non-fault condition comprises subsequent commencement of operation of the processor.   
   
   
       28 . A self-test method according to  claim 26  wherein the electronic system includes a processor, wherein:
 the placing of the electronic system into a first fault condition comprises starting operation of the processor; and   subsequent reversion of the electronic system to a non-fault condition comprises subsequent cessation of operation of the processor.   
   
   
       29 . A self-test method according to  claim 28  wherein the fault-monitoring device comprises a voltage detector which generates a fault signal when an over-voltage occurs. 
   
   
       30 . A self-test method according to  claim 28  wherein the fault-monitoring device comprises a device for monitoring the operation of a processor and generating a fault signal on detection of a fault with the operation of the processor. 
   
   
       31 . A self-test method according to  claim 28  further comprising clearing the non-volatile memory of the record once it has been determined whether or not the non-volatile memory includes a record.