Printed wiring board and information processing apparatus

Abstract

According to one embodiment, a printed wiring board includes, a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip, second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip, and interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region.

1 . A printed wiring board comprising:
 a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer;   first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip and with a first pitch;   second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip and with a second pitch that differs from the first pitch; and   interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region.   
   
   
       2 . The printed wiring board according to  claim 1 , wherein the interlayer wiring is formed of blind via plugs. 
   
   
       3 . The printed wiring board according to  claim 1 , further comprising a connector provided on the obverse side in a third region defined thereon and overlapping the second region, another printed wiring board with a fourth semiconductor chip mounted thereon being inserted in the connector. 
   
   
       4 . The printed wiring board according to  claim 1 , wherein:
 first and second semiconductor chips are ball grid array packages; and   the first semiconductor chip is connected to the first pads, and the second semiconductor chip is connected to the second pads.   
   
   
       5 . An information processing apparatus comprising:
 a processing unit including first terminals arranged with a first pitch;   a bridge circuit chip including second terminals arranged with a second pitch that differs from second pitch; and   a printed wiring board,   the printed wiring board including:   a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer;   first pads provided on the obverse side in a first region and to be connected to the first terminals arranged on a surface of the processing unit;   second pads provided on the reverse side in a second region overlapping with the first region, and to be connected to the second terminals arranged on a surface of the bridge circuit chip; and   interlayer wiring electrically connecting those ones of the first pads, which are located in an overlapping region, to those ones of the second pads which are located in the overlapping region.   
   
   
       6 . The information processing apparatus according to  claim 5 , wherein the main body has a stacked structure. 
   
   
       7 . The information processing apparatus according to  claim 5 , wherein the interlayer wiring is formed of blind via plugs. 
   
   
       8 . The information processing apparatus according to  claim 5 , further comprising a connector provided on the obverse side in a third region defined thereon and overlapping the second region, a memory module being inserted in the connector. 
   
   
       9 . The information processing apparatus according to  claim 5 , wherein the processing unit and bridge circuit chip are ball grid array packages. 
   
   
       10 . A printed wiring board comprising:
 a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer;   first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip;   second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip;   interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region;   third pads provided on the reverse side in a third region defined thereof and overlapping with the first region, the third pads to be connected to terminals arranged on a lower surface of a third semiconductor chip; and   other interlayer wiring electrically connecting those of the second pads, which are located in another overlapping region, to those of the third pads which are located in said another overlapping region, the second and third regions overlapping with each other in said another overlapping region.   
   
   
       11 . The printed wiring board according to  claim 10 , further comprising a connector provided on the obverse side in a fourth region defined thereon and overlapping the second region, another printed wiring board with a fourth semiconductor chip mounted thereon being inserted in the connector. 
   
   
       12 . The printed wiring board according to  claim 10 , wherein the interlayer wiring is formed of blind via plugs. 
   
   
       13 . The printed wiring board according to  claim 10 , wherein:
 first and second semiconductor chips are ball grid array packages; and   the first semiconductor chip is connected to the first pads, and the second semiconductor chip is connected to the second pads.   
   
   
       14 . An information processing apparatus comprising:
 a processing unit including first terminals;   a bridge circuit chip including second terminals; and   a printed wiring board,   the printed wiring board including:   a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer;   first pads provided on the obverse side in a first region and to be connected to the first terminals arranged on a surface of the processing unit;   second pads provided on the reverse side in a second region overlapping with the first region, and to be connected to the second terminals arranged on a surface of the bridge circuit chip;   interlayer wiring electrically connecting those ones of the first pads, which are located in an overlapping region, to those ones of the second pads which are located in the overlapping region;   another bridge circuit chip including third terminals;   third pads provided on the reverse side in a third region defined thereof and overlapping with the first region, the third pads to be connected to the third terminals of said another bridge circuit chip; and   other interlayer wiring electrically connecting those of the second pads, which are located in another overlapping region, to those of the third pads which are located in said another overlapping region, the second and third regions overlapping with each other in said another overlapping region.   
   
   
       15 . The information processing apparatus according to  claim 14 , further comprising a connector provided on the obverse side in a fourth region defined thereon and overlapping the second region, a memory module being inserted in the connector. 
   
   
       16 . The information processing apparatus according to  claim 14 , wherein the main body has a stacked structure. 
   
   
       17 . The information processing apparatus according to  claim 14 , wherein the interlayer wiring is formed of blind via plugs. 
   
   
       18 . The information processing apparatus according to  claim 14 , wherein the processing unit and bridge circuit chip are ball grid array packages.