Solid-state imaging device

Abstract

An n/p semiconductor substrate is formed in such a manner that an n type semiconductor layer is deposited on a p + semiconductor substrate. An imaging area including a plurality of n type semiconductor regions making photoelectric conversion and a plurality of p type semiconductor region for isolation formed around the n type semiconductor regions, is formed in the n/p semiconductor substrate. The n type semiconductor layer is divided into an upper layer and a lower layer. A second n type semiconductor region is formed to connect to the p + type semiconductor substrate from a surface of the n/p semiconductor substrate in a peripheral region of the imaging area.

1 . A solid-state imaging device comprising:
 an n/p semiconductor substrate having a structure that an n type semiconductor layer is formed on a p type semiconductor substrate;   an imaging area including a plurality of first n type semiconductor regions formed in the n/p semiconductor substrate and making photoelectric conversion, and a plurality of first p type semiconductor region for isolation formed in the n/p semiconductor substrate to be positioned around the first n type semiconductor regions;   a p type semiconductor layer formed in the n type semiconductor layer, and divided into an upper layer and a lower layer; and   a second n type semiconductor region formed to connect to the p type semiconductor substrate from a surface of the n/p semiconductor substrate in a peripheral region of the imaging area.   
   
   
       2 . The solid-state imaging device according to  claim 1 , wherein the upper and lower layers of the n type semiconductor layer have equal impurity concentration. 
   
   
       3 . The solid-state imaging device according to  claim 1 , wherein the lower layer of the n type semiconductor layer is an n type drain layer. 
   
   
       4 . The solid-state imaging device according to  claim 3 , wherein impurity concentration of the n type drain layer is higher than that of the upper layer of the n type semiconductor layer. 
   
   
       5 . The solid-state imaging device according to  claim 1 , further comprising:
 a plurality of third n type semiconductor regions formed to connect to the lower layer of the n type semiconductor layer from the surface of the n/p semiconductor substrate in each of the first p type semiconductor regions.   
   
   
       6 . The solid-state imaging device according to  claim 4 , wherein at least part of each of the first p type semiconductor regions contacts with the p type semiconductor substrate. 
   
   
       7 . The solid-state imaging device according to  claim 4 , wherein the imaging area includes three kinds of pixels photo-electrically converting light three primary color, and of the three kinds of pixels, the n type semiconductor layer corresponding to each pixel on which red light is incident is not formed with the p type semiconductor layer. 
   
   
       8 . A solid-state imaging device comprising:
 an n/p semiconductor substrate having a structure that an n type semiconductor layer is formed on a p type semiconductor substrate;   an imaging area including a plurality of first n type semiconductor regions formed in the n/p semiconductor substrate and making photoelectric conversion, and a plurality of first p type semiconductor region for isolation formed in the n/p semiconductor substrate to be positioned around the first n type semiconductor regions;   a digital circuit area and an analog circuit area formed around the imaging area;   a p type semiconductor layer formed in the n type semiconductor layer, and divided into an upper layer and a lower layer;   a second n type semiconductor region formed to connect to the p type semiconductor substrate from a surface of the n/p semiconductor substrate in a peripheral region of the imaging area; and   a second p type semiconductor region formed in the n type semiconductor layer to reach to the p type semiconductor substrate from the surface of the n/p semiconductor substrate in the digital circuit area and the analog circuit area.   
   
   
       9 . The solid-state imaging device according to  claim 8 , wherein the second p type semiconductor region is p well. 
   
   
       10 . The solid-state imaging device according to  claim 8 , wherein the upper and lower layers of the n type semiconductor layer have equal impurity concentration. 
   
   
       11 . The solid-state imaging device according to  claim 8 , wherein the lower layer of the n type semiconductor layer is an n type drain layer. 
   
   
       12 . The solid-state imaging device according to  claim 11 , wherein impurity concentration of the n type drain layer is higher than that of the upper layer of the n type semiconductor layer. 
   
   
       13 . The solid-state imaging device according to  claim 8 , further comprising:
 a plurality of third n type semiconductor regions formed to connect to the lower layer of the n type semiconductor layer from the surface of the n/p semiconductor substrate in each of the first p type semiconductor regions.   
   
   
       14 . The solid-state imaging device according to  claim 13 , wherein at least part of each of the first p type semiconductor regions contacts with the p type semiconductor substrate. 
   
   
       15 . A solid-state imaging device comprising:
 an n/p semiconductor substrate having a structure that an n type semiconductor layer is formed on a p type semiconductor substrate;   an imaging area including a plurality of first n type semiconductor regions formed in the n/p semiconductor substrate and making photoelectric conversion, and a plurality of first p type semiconductor region for isolation formed in the n/p semiconductor substrate to be positioned around the first n type semiconductor regions;   a digital circuit area and an analog circuit area formed around the imaging area;   a p type semiconductor layer formed in the n type semiconductor layer, and divided into an upper layer and a lower layer;   a second n type semiconductor region formed to connect to the p type semiconductor substrate from a surface of the n/p semiconductor substrate in a peripheral region of the imaging area;   a second p type semiconductor region formed in the n type semiconductor layer at a depth, which does not reach to the p type semiconductor substrate from the surface of the n/p semiconductor substrate in the digital circuit area; and   a third p type semiconductor region formed in the n type semiconductor layer to reach to the p type semiconductor substrate from the surface of the n/p semiconductor substrate in the analog circuit area.   
   
   
       16 . The solid-state imaging device according to  claim 15 , wherein the second and third p type semiconductor region are each p well. 
   
   
       17 . The solid-state imaging device according to  claim 15 , wherein the upper and lower layers of the n type semiconductor layer have equal impurity concentration. 
   
   
       18 . The solid-state imaging device according to  claim 15  wherein the lower layer of the n type semiconductor layer is an n type drain layer. 
   
   
       19 . The solid-state imaging device according to  claim 15 , further comprising:
 a plurality of third n type semiconductor regions formed to connect to the lower layer of the n type semiconductor layer from the surface of the n/p semiconductor substrate in each of the first p type semiconductor regions.   
   
   
       20 . The solid-state imaging device according to  claim 19 , wherein at least part of each of the first p type semiconductor regions contacts with the p type semiconductor substrate.