CMOS Image Sensor
Abstract
A method of fabricating a CMOS image sensor is disclosed, by which image sensor characteristics are enhanced. In one aspect, the method includes forming a plurality of photodiodes in the photodiode region of a semiconductor substrate; stacking a first insulating layer over the semiconductor substrate including the photodiodes; forming a metal pad on the insulating layer in the pad region of the substrate; forming a second insulating layer over the semiconductor substrate including the metal pad; selectively etching exposed portions of the second insulating layer, using a mask, to form simultaneously a pad opening in the pad region and a trench in the photodiode region; selectively etching portions of the second insulating layer and the first insulating layer under the trench; and forming a slope on lateral sides of at least the second insulating layer.
Claims
exact text as granted — not AI-modified1 . A CMOS image sensor, comprising:
a semiconductor substrate having a photodiode region and a pad region; a plurality of photodiodes in the photodiode region; a first insulating layer over the semiconductor substrate including the photodiodes; a metal pad on the first insulating layer in the pad region; a second insulating layer over the semiconductor substrate including the metal pad; a pad opening in the pad region; and a trench in the first and second insulating layers in the photodiode region, the trench having a slope on lateral sides of at least the second insulating layer.
2 . The CMOS image sensor of claim 1 , wherein the trench also has a slope on lateral sides of the first insulating layer.
3 . The CMOS image sensor of claim 1 , wherein the pad opening also has a slope on its lateral sides.
4 . The CMOS image sensor of claim 1 , further comprising a plurality of microlenses on the first insulating layer in the photodiode region.
5 . The CMOS image sensor of claim 4 , wherein the microlenses comprise a resist.
6 . The CMOS image sensor of claim 4 , wherein the microlenses comprise an oxide layer.
7 . The CMOS image sensor of claim 6 , wherein the microlenses comprise a tetra-ethyl-ortho-silicate oxide.
8 . The CMOS image sensor of claim 1 , wherein the second insulating layer comprises an oxide layer and a nitride layer thereon.
9 . The CMOS image sensor of claim 1 , wherein the semiconductor substrate comprises first and second epitaxial layers.
10 . The CMOS image sensor of claim 1 , wherein the plurality of photodiodes are adjacent to one another in the photodiode region.
11 . The CMOS image sensor of claim 1 , wherein the semiconductor substrate comprises a single-crystal silicon wafer.
12 . The CMOS image sensor of claim 11 , further comprising an epitaxial silicon layer on the single-crystal silicon wafer.
13 . The CMOS image sensor of claim 1 , wherein the first insulating layer comprises a multi-layer structure.
14 . The CMOS image sensor of claim 13 , wherein a first layer of the multi-layer structure comprises tetra-ethyl-ortho-silicate oxide.
15 . The CMOS image sensor of claim 13 , wherein a second layer of the multi-layer structure comprises a borophosphorus silicate glass layer.
16 . The CMOS image sensor of claim 13 , further comprising a light shielding layer between first and second layers of the multi-layer structure.
17 . The CMOS image sensor of claim 13 , wherein the multi-layer structure has a thickness of about 1,000 Å.
18 . The CMOS image sensor of claim 1 , wherein the metal pad comprises aluminum.
19 . The CMOS image sensor of claim 1 , further comprising a titanium nitride layer on the metal pad.
20 . The CMOS image sensor of claim 1 , wherein the photodiode region and the pad region have different thicknesses.Cited by (0)
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