US2008284459A1PendingUtilityA1

Testing Using Independently Controllable Voltage Islands

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Assignee: IBMPriority: Feb 20, 2003Filed: Aug 4, 2008Published: Nov 20, 2008
Est. expiryFeb 20, 2023(expired)· nominal 20-yr term from priority
H10P 74/277G01R 31/318575G01R 31/318555G01R 31/318544G01R 31/318536
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Claims

Abstract

A voltage island architecture wherein the source voltage of each voltage island can be independently turned on/off or adjusted during a scan-based test. The architecture includes a plurality of voltage islands, each powered by a respective island source voltage, and a testing circuit, coupled to the voltage islands, and powered by a global source voltage that is always on during test, wherein each island source voltage may be independently controlled during test.

Claims

exact text as granted — not AI-modified
1 . A method for testing an integrated circuit chip including voltage partitions, comprising:
 powering down some of the voltage partitions on the chip; and   performing scan chain-based IDDQ testing on the voltage partitions that remain powered up.   
   
   
       2 . A method for testing an integrated circuit chip including voltage partitions, comprising:
 powering down some of the voltage partitions on the chip; and   performing scan chain-based voltage burn-in testing on the voltage partitions that remain powered up.

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