Wide window clock scheme for loading output fifo registers
Abstract
A circuit provides the widest possible window for capturing data and preventing run-through in a FIFO register. The FIFO register includes two registers per I/O. Two FIFO input clocks are used, one for each FIFO register. When one FIFO clock is active, the other is automatically disabled. Initially, the circuit is reset such that one clock is active, and the other disabled. Upon receiving a valid READ command, a shift chain attached to the FICLK that is currently low begins counting the clock cycles. This eventually determines when the FICLK that is currently low can be enabled. The final enable is dependent upon the turning off the FICLK that is currently high. The FICLK that is enabled during the reset turns off a fixed delay after the falling edge of the YCLK associated with the READ command.
Claims
exact text as granted — not AI-modified1 . A FIFO clock circuit comprising: a first capture circuit receiving first and second internal clock signals; a first delay circuit coupled to the first capture circuit receiving an external clock signal; a first FIFO clock start capture and latch circuit coupled to the first delay circuit; a first FIFO clock generator circuit receiving read/write information coupled to the first FIFO clock start capture and latch circuit for generating a first FIFO clock signal; a second capture circuit receiving first and second internal clock signals; a second delay circuit coupled to the second capture circuit receiving an external clock signal; a second FIFO clock start capture and latch circuit coupled to the second delay circuit; a second FIFO clock generator circuit receiving read/write information coupled to the second FIFO clock start capture and latch circuit for generating a first FIFO clock signal; and circuitry for providing latency information to the first and second capture circuits and to the first and second FIFO clock generator circuits, wherein the first and second FIFO clock start capture and latch circuits are in electrical communication.
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