Semiconductor image sensor array device, apparatus comprising such a device and method for operating such a device

Abstract

A plural line CMOS sensor array device is provided with sensor cells arranged in a matrix of coordinate-wise rows and columns. Each cell comprises a photosensitive area, an output node, and a transfer gate for selectively interconnecting the photosensitive area and the output node. Along at least a first coordinate direction adjacent cells are functionally configured as mutually mirror-symmetric structures in that their proximate output nodes are facing each other and are arranged for separately feeding a respective output channel. Preferably, also in a second coordinate direction adjacent cells are functionally configured as mutually mirror-symmetric structures in that their proximate output nodes are facing each other and all such facing output nodes are separately feeding a respective column-directed output channel.

1 . A plural-line CMOS semiconductor image sensor array device provided with sensor cells arranged in a matrix of coordinate-wise rows and columns, each cell comprising a photosensitive area, an output node, and a transfer gate for selectively interconnecting the photosensitive area and the output node, and wherein along at least a first coordinate direction adjacent cells are functionally configured as mutually mirror-symmetric structures in that their proximate output nodes are facing each other and are arranged for separately feeding a respective output channel. 
   
   
       2 . A device as claimed in  claim 1 , wherein transfer gates pertaining to output nodes so facing each other are arranged for being either collectively actuated or, alternatively, for being actuated odd gates mutually exclusive with respect to even gates, and vice versa. 
   
   
       3 . A device as claimed in  claim 1 , and wherein also in a second coordinate direction adjacent cells are functionally configured as mutually mirror-symmetric structures in that their proximate output nodes are facing each other and all such facing output nodes are separately feeding a respective column-directed output channel. 
   
   
       4 . A device as claimed in  claim 3 , wherein in said other coordinate direction odd and even transfer gates are arranged for being either collectively actuated or, alternatively actuated odd gates mutually exclusive with respect to even gates, and vice versa. 
   
   
       5 . A device as claimed in  claim 1 , wherein said output channels feed a top row/bottom row selection switch arrangement. 
   
   
       6 . A device as claimed in  claim 5 , furthermore comprising for each row of sensor cells an odd/even row exposure control gate facility. 
   
   
       7 . A device as claimed in  claim 3 , and having control facilities for in a respective pixel row allowing uniform start and stop instants of all pixel integration times, but for among different rows allowing respective different start and stop instants of pixel integration times, and for allowing independent readout of each respective pixel row. 
   
   
       8 . A device as claimed in  claim 7  and being arranged for allowing a zero integration time for any pixel row. 
   
   
       9 . A device as claimed in  claim 3  and having control facilities for through binning in horizontal and/or vertical direction between adjacent pixels constituting a composite pixel. 
   
   
       10 . A device as claimed in  claim 3  and having selective spectral filters associated with respective pixels in selective pixel rows. 
   
   
       11 . A device as claimed in  claim 10 , wherein a selective pixel row has uniform spectral filters. 
   
   
       12 . A device as claimed in  claim 10 , wherein a selective pixel row has non-uniform spectral filters arranged according to a uniformly rotating spectral sequence. 
   
   
       13 . A device as claimed in  claim 3  and having four rows of pixels. 
   
   
       14 . A method for operating a device as claimed in  claim 3 , and having a check facility for removing a pixel signal when determined to represent a column-wise deviating pixel signal value. 
   
   
       15 . A method for operating a device as claimed in  claim 3 , and having a control facility for replacing a deviating pixel signal value by a column-wise filtered pixel signal value. 
   
   
       16 . An apparatus comprising a device as claimed in  claim 3  and having further signal processing facilities.