Skew Compensation by Changing Ground Parasitic For Traces

Abstract

According to embodiments, small holes or openings may be cut on or through the ground plane(s) adjacent to a selected trace line, so that C and L will be changed accordingly. Then phase velocity will also be changed. As a result, the flying time from one location or point to a different location or point of the transmission line will also be changed. This concept applies to a single trace. Similarly, this concept may be applied to one trace of a differential pair of traces (e.g., so that the two parts of the differential signal transmitted at one point in time at a location on the pair arrive at the same time at another location of the pair).

1 . A method of changing a ground parasitic of a trace of a differential signal pair of signal traces comprising:
 forming a plurality of openings through a conductive ground layer of a printed circuit board (PCB) under the trace, wherein forming changes a capacitive phase characteristic of the trace and changes an inductive phase characteristic of the trace.   
   
   
       2 . The method of  claim 1  wherein the plurality of openings are a plurality of non-conductive openings through the conductive ground layer. 
   
   
       3 . The method of  claim 1  wherein the trace is a differential trace of one of a micro strip pair and a stripline pair of a printed circuit board (PCB) or a semiconductor chip package. 
   
   
       4 . The method of  claim 1  further comprising forming a plurality of columns of insulator material in the openings, wherein the columns have a square footprint shape defined on a top surface of the ground layer. 
   
   
       5 . The method of  claim 4  wherein the columns of insulator material are columns of only insulator material in the openings. 
   
   
       6 . A method of adjusting a signal transmission skew of a differential signal pair of signal traces comprising:
 forming a plurality of openings through a conductive ground layer of a printed circuit board (PCB) under a first trace of the differential signal pair, wherein forming changes a capacitive phase characteristic of the first trace and changes an inductive phase characteristic of the first trace.   
   
   
       7 . The method of  claim 6  wherein the characteristic is proportional to a square root of a product of an inductance and a capacitance of the trace and the ground layer. 
   
   
       8 . The method of  claim 6  further comprising:
 forming an insulator material layer on the conductive ground layer and through the openings;   forming the trace on the insulating layer over the openings.   
   
   
       9 . The method of  claim 8  wherein the insulator material extends to a surface of a second insulator layer below the ground layer. 
   
   
       10 . A printed circuit board (PCB) comprising:
 a layer of conductive material formed on a layer of insulator material;   a first differential trace and a second differential trace formed on the insulator layer, wherein a first length of the first differential trace is a longer length than a second length of the second differential trace;   a plurality of openings in the conductive layer filled with the insulator material, each opening disposed closer to the first trace than to the second trace and having at least a portion of the opening under the first trace.   
   
   
       11 . The PCB of  claim 10  wherein a footprint size of the openings compensates for a skew in signal phase velocity due to the longer length of the first trace as compared to the second trace. 
   
   
       12 . The PCB of  claim 10  wherein the plurality of openings cause a first part of a differential signal transmitted on the first trace to travel slower as compared to a second part of a differential signal transmitted on the second trace. 
   
   
       13 . The PCB of  claim 10  wherein the first and second trace comprise a pair of differential traces and the plurality of openings comprise openings in the conductive layer under the first trace and filled with the insulator material to correct a skew between the pair of differential traces. 
   
   
       14 . The PCB of  claim 10  wherein the first and second trace comprise a pair of differential traces and the plurality of openings: (1) change a capacitive phase characteristic and an inductive phase characteristic of the first trace, and (2) cause the a capacitive phase characteristic and an inductive phase characteristic of the first trace to be different than a capacitive phase characteristic and an inductive phase characteristic of the second trace. 
   
   
       15 . The PCB of  claim 10  wherein the openings comprise a sufficient number of openings having a sufficient footprint size in the conductive layer to slow transmission of the first portion of the differential signal on the first trace to substantially eliminate the skew. 
   
   
       16 . The PCB of  claim 10  wherein the first conductive layer comprises a ground layer, and the insulator layer comprises a layer of printed circuit board (PCB) or dielectric material, and the insulator layer is disposed between the ground layer and the traces. 
   
   
       17 . The PCB of  claim 10  wherein the openings comprise a footprint shape in a surface of the conductor defined by one of a circle, a square, a triangle, a rectangle, a polygon, a polyhedron, extending through the first conductive layer to a second insulator layer disposed on an opposing surface of the first conductive layer from the insulator layer.