US2009009371A1PendingUtilityA1

Method and apparatus for a/d conversion

39
Assignee: WIESBAUER ANDREASPriority: Jan 10, 2007Filed: Sep 19, 2008Published: Jan 8, 2009
Est. expiryJan 10, 2027(~0.5 yrs left)· nominal 20-yr term from priority
H03M 3/424H03M 3/412H03M 3/454H03M 3/49H03M 3/484H03M 3/448
39
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Claims

Abstract

A method and an apparatus for converting an analog input signal into a digital output signal using a sigma-delta modulator architecture with a digital tracking filter. The digital tracking filter may have an order greater than one, and the signal and noise transfer functions of the sigma-delta modulator architecture are chosen to provide a sigma-delta modulator architecture with a high dynamic range even if a relatively low oversampling ratio is used.

Claims

exact text as granted — not AI-modified
1 . A method for converting an analog input signal to a digital output signal, the method comprising:
 filtering a quantized difference signal with a filter function having a second order or third order filter function to obtain a digital estimate signal of the analog input signal; and   converting the digital estimate signal to the analog estimate signal.   
   
   
       2 . The method according to  claim 1 , wherein the digital estimate signal is quantized by a quantizer before converting it into the analog estimate signal. 
   
   
       3 . The method of  claim 1 , wherein the difference signal is quantized using a quantizer having a resolution of up to six bits to obtain the quantized different signal. 
   
   
       4 . An apparatus configured to convert an analog input signal to a digital output signal, the apparatus comprising:
 a filer having a second order or third order filter function, the filter configured to obtain a digital estimate signal of the analog input signal; and   a digital/analog converter configured to convert the digital estimate signal into an analog estimate signal.   
   
   
       5 . The apparatus according to  claim 4 , wherein a quantizer is provided between the filter and an adder which is configured to form a difference signal. 
   
   
       6 . The apparatus according to  claim 5 , wherein the quantizer has a resolution of up to six bits.

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