Processor for making more efficient use of idling components and program conversion apparatus for the same
Abstract
A processor that has a plurality of instruction slots each of which stores an instruction to be executed in parallel. One of the plurality of instruction slots is a first instruction slot and another a second instruction slot. A special instruction stored in the first instruction slot is executed by a first functional unit that executes instructions stored in the first instruction slot, and a second functional unit that executes instructions stored in the second instruction slot. An instruction stored in the second instruction slot is executed in parallel by a third functional unit that executes instructions stored in the second instruction slot.
Claims
exact text as granted — not AI-modified1 - 20 . (canceled)
21 . An apparatus that converts instructions for execution in parallel, the apparatus comprising:
a retrieving unit operable to retrieve a first instruction for performing a first operation, a second instruction for performing a second operation and at least one other instruction; an instruction generating unit operable to combine the first instruction and the second instruction to generate a single third instruction for performing the first operation and the second operation; and an instruction allocation unit operable to arrange the third instruction and the at least one other instruction for execution in parallel.
22 . An instruction converting method comprising:
retrieving a first instruction, a second instruction and at least one other instruction; combining the first instruction and the second instruction to generate a single third instruction which includes the first instruction and the second instruction; and arranging the third instruction and the at least one other instruction for execution in parallel.Join the waitlist — get patent alerts
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