US2009014837A1PendingUtilityA1
Semiconductor device and method of manufacturing the same
Est. expiryJul 13, 2027(~1 yrs left)· nominal 20-yr term from priority
Inventors:Young Jin Park
H10D 84/00H10D 84/811H10D 84/40H10D 89/00H10D 84/80
45
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Claims
Abstract
The present invention relates to a semiconductor device and a method of manufacturing the same. A high-resistance silicon wafer is manufactured in such a manner that a large-sized silicon wafer manufactured by the Czochralski method is irradiated with neutrons, and high-resistance and low-resistance elements are simultaneously formed on the high-resistance silicon wafer. Thus, the manufacturing cost can be remarkably saved, and the reliability of products can be enhanced.
Claims
exact text as granted — not AI-modified1 . A device comprising:
a substrate; and a high-resistance element in a first region of the substrate and a low-resistance element in a second region of the substrate.
2 . The device of claim 1 wherein the substrate is a high resistance substrate.
3 . The device of claim 1 comprises a semiconductor device.
4 . The device of claim 1 wherein the low-resistance element is formed on an impurity ion implanted region formed in the second region of the substrate.
5 . The device of claim 1 wherein the substrate is manufactured by irradiating neutrons onto a silicon wafer fabricated by a Czochralski method.
6 . The device of claim 1 wherein the substrate has a resistance of 10 kΩ-cm or more.
7 . The device of claim 1 wherein the low-resistance element comprises a transistor, a resistor, a capacitor, or a diode or a combination thereof.
8 . The device of claim 1 wherein the high-resistance element comprises a radio frequency integrated passive device (RFIPD), an isolator, a transformer, a filter, a diplexer, a balance to unbalance transformer (balun), a coupler or an antenna or a combination thereof.
9 . A semiconductor device comprising:
a substrate having a first region, wherein the first region comprises an impurity ion implanted region; a low-resistance element on the first region; a wire on an interlayer dielectric layer, wherein the wire is connected to the low-resistance element through an interlayer dielectric layer; and a high-resistance element connected to a predetermined region of the wire.
10 . The semiconductor device of claim 9 wherein the substrate is manufactured by irradiating neutrons onto a silicon wafer fabricated by a Czochralski method.
11 . The semiconductor device of claim 9 wherein the substrate comprises a high resistance substrate having a resistance of 10 kΩ-cm or more.
12 . The semiconductor device of claim 11 wherein the resistance of the substrate is adjusted according to the amount and irradiation time of neutrons.
13 . The semiconductor device of claim 9 wherein the low-resistance element comprises a transistor, a resistor, a capacitor or a diode or a combination thereof.
14 . The semiconductor device of claim 9 wherein the high-resistance element comprises a radio frequency integrated passive device (RFIPD), an isolator, a transformer, a filter, a diplexer, a balance to unbalance transformer (balun), a coupler or an antenna or a combination thereof.
15 . The semiconductor device of claim 9 further comprising an inductor formed between the wire and the high-resistance element.
16 . A method of manufacturing a device comprising:
ion-implanting an impurity in a first region of a substrate; forming a low-resistance element on the first region of the substrate; forming a first interlayer dielectric layer on the substrate over the low-resistance element; forming a contact hole in the first interlayer dielectric layer to expose a predetermined region of the low-resistance element; forming a first wire in the first interlayer dielectric layer, the first wire connected to the low-resistance element by the contact hole; forming second interlayer dielectric layer over the first interlayer dielectric layer; forming a via hole and a trench in the second interlayer dielectric layer, wherein the via hole exposes a predetermined region of the first wire and the trench comprises a predetermined shape; forming an inductor by forming a conductive layer to fill the via hole and the trench; and forming a high-resistance element connected to the inductor.
17 . The method of claim 16 wherein the substrate is manufactured by irradiating neutrons onto a silicon ingot fabricated by the Czochralski method and cutting it.
18 . The method of claim 17 wherein the resistance of the substrate is adjusted according to the amount and irradiation time of neutrons.
19 . The method of claim 16 wherein the substrate is manufactured by cutting a silicon ingot fabricated by the Czochralski method at a predetermined thickness and irradiating it with neutrons.
20 . The method of claim 19 wherein the resistance of the substrate is adjusted according to the amount and irradiation time of neutrons.
21 . The method of claim 16 wherein the low-resistance element comprises a transistor, a resistor, a capacitor or a diode or a combination thereof.Cited by (0)
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