Wafer-level assembly of heat spreaders for dual ihs packages

Abstract

An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.

1 - 8 . (canceled) 
     
     
         9 . A package comprising:
 a substrate;   a die assembly attached to the substrate, the die assembly comprising:
 a thin die having a thickness, 
 a first thermal interface material (TIM) deposited on the thin die, and 
 a first heat spreader (HS) attached to the thin die through the first TIM; 
   a second TIM attached to the first HS; and   a second heat spreader attached to the substrate and the second TIM, the second heat spreader enclosing the die assembly.   
     
     
         10 . The package of  claim 9  further comprising:
 an underfill dispensed between the die assembly and the substrate.   
     
     
         11 . The package of  claim 9  wherein the thickness is less than 50 μm. 
     
     
         12 . The package of  claim 9  wherein the first TIM has a remelting point higher than 250° C. 
     
     
         13 . The package of  claim 9  wherein the first TIM has thickness less than the second TIM. 
     
     
         14 . The package of  claim 9  wherein the first TIM has thickness of approximately 5 μm. 
     
     
         15 . The package of  claim 9  wherein the first heat spreader is approximately equal to the thin die in size. 
     
     
         16 . A system comprising:
 a front end processing unit to receive and transmit a radio frequency (RF) signal, the RF signal being converted to digital data;   a digital processor coupled to the front end processing unit to process the digital data; and   a memory device coupled to the digital processor, the memory device being packaged in a package, the package comprising:
 a substrate, 
 a die assembly attached to the substrate, the die assembly comprising:
 a thin die having a thickness, 
 a first thermal interface material (TIM) deposited on the thin die, and 
 a first heat spreader (HS) attached to the first TIM, 
 
 a second TIM attached to the first HS, and 
 a second heat spreader attached to the substrate and the second TIM, the second heat spreader enclosing the die assembly. 
   
     
     
         17 . The system of  claim 16  further comprising:
 an underfill dispensed between the die assembly and the substrate.   
     
     
         18 . The system of  claim 16  wherein the thickness is less than 50 μm. 
     
     
         19 . The system of  claim 16  wherein the first TIM has a remelting point higher than 250° C. 
     
     
         20 . The system of  claim 16  wherein the first TIM has thickness less than the second TIM. 
     
     
         21 . The system of  claim 16  wherein the first TIM has thickness of approximately 5 μm. 
     
     
         22 . The system of  claim 16  wherein the first heat spreader is approximately equal to the thin die in size.