Off-line broadband network interface

Abstract

A system for processing a data packet is disclosed and may include at least one processor that enables receiving of a data packet at a station on a network, the data packet having a preamble which includes a destination tag and a training sequence. The at least one processor may enable obtaining a channel model using the training sequence, and encoding each of one or more addresses that the station receives with the channel model to produce a result. The at least one processor may also enable comparing the result with the destination tag. The at least one processor may enable convolving of each of the one or more addresses that the station receives with the channel model to produce the result.

1 - 130 . (canceled) 
   
   
       131 . A system for processing a data packet, comprising:
 at least one processor that enables receiving of a data packet at a station on a network, the data packet having a preamble which includes a destination tag and a training sequence;   said at least one processor enables obtaining a channel model using the training sequence;   said at least one processor enables encoding each of one or more addresses that the station receives with the channel model to produce a result; and   said at least one processor enables comparing the result with the destination tag.   
   
   
       132 . The system of  claim 131 , wherein said at least one processor enables convolving of each of the one or more addresses that the station receives with the channel model to produce the result. 
   
   
       133 . The system of  claim 131 , wherein said at least one processor enables receiving of multiple data packets, and wherein said at least one processor enables obtaining a channel model for each of the multiple data packets. 
   
   
       134 . The system of  claim 133 , wherein the multiple data packets are received at one of a plurality of stations on a network, and wherein a training sequence in a preamble of each of the multiple data packets remains fixed for every station on the network. 
   
   
       135 . The system of  claim 131 , wherein the training sequence is repeated multiple times in the preamble. 
   
   
       136 . The system of  claim 135 , wherein the training sequence is repeated three times in the preamble. 
   
   
       137 . The system of  claim 131 , wherein said at least one processor enables processing of the data packet and using the processed data packet to refine the channel model for subsequently received packets, if a match is found between the result and the destination tag. 
   
   
       138 . The system of  claim 131 , wherein said at least one processor enables discarding of the data packet, if a match is not found between the result and the destination tag. 
   
   
       139 . The system of  claim 131 , wherein the training sequence is periodic sequence with period N, where N is greater than a maximum channel length. 
   
   
       140 . The system of  claim 139 , wherein N=8 and the training sequence comprises a sequence of QPSK symbols. 
   
   
       141 . A system for processing a data packet, comprising:
 at least one processor that enables receiving of a data packet having a preamble which includes a destination tag and a training sequence;   said at least one processor enables obtaining a channel model using the training sequence;   said at least one processor enables decoding the destination tag using the channel model to produce a result; and   said at least one processor enables comparing the result with one or more received addresses.   
   
   
       142 . The system of  claim 141 , wherein said at least one processor enables produced of the result by convolving the destination tag with the channel model. 
   
   
       143 . The system of  claim 141 , wherein said at least one processor enables receiving of multiple data packets, and wherein said at least one processor enables obtaining a channel model for each of the multiple data packets. 
   
   
       144 . The system of  claim 143 , wherein the multiple data packets are received at one of a plurality of stations on a network, and wherein a training sequence in a preamble of each of the multiple data packets remains fixed for every station on the network. 
   
   
       145 . The system of  claim 141 , wherein the training sequence is repeated multiple times in the preamble. 
   
   
       146 . The system of  claim 145 , wherein the training sequence is repeated three times in the preamble. 
   
   
       147 . The system of  claim 141 , wherein said at least one processor enables processing of the data packet and using the processed data packet to refine the channel model for subsequently received packets, if a match is found between the result and the destination tag. 
   
   
       148 . The system of  claim 141 , wherein said at least one processor enables discarding of the data packet, if a match is not found between the result and the destination tag. 
   
   
       149 . The system of  claim 141 , wherein the training sequence is a periodic sequence with period N where N is greater than a maximum channel length. 
   
   
       150 . The system of  claim 149 , wherein N=8 and the training sequence comprises a sequence of QPSK symbols. 
   
   
       151 . A system for processing a data packet, comprising:
 one or more circuits operable to receive a data packet at a station on a network, the data packet having a preamble which includes a destination tag and a training sequence;   said one or more circuits operable to obtain a channel model using the training sequence;   said one or more circuits operable to encode each of one or more addresses that the station receives with the channel model to produce a result; and   said one or more circuits operable to compare the result with the destination tag.   
   
   
       152 . The system of  claim 151 , wherein said one or more circuits operable to convolve each of the one or more addresses that the station receives with the channel model to produce the result. 
   
   
       153 . The system of  claim 151 , wherein said one or more circuits operable to receive multiple data packets, and wherein said one or more circuits operable to obtain a channel model for each of the multiple data packets. 
   
   
       154 . The system of  claim 153 , wherein the multiple data packets are received at one of a plurality of stations on a network, and wherein a training sequence in a preamble of each of the multiple data packets remains fixed for every station on the network. 
   
   
       155 . The system of  claim 151 , wherein the training sequence is repeated multiple times in the preamble. 
   
   
       156 . The system of  claim 155 , wherein the training sequence is repeated three times in the preamble. 
   
   
       157 . The system of  claim 151 , wherein said one or more circuits operable to process the data packet and use the processed data packet to refine the channel model for subsequently received packets, if a match is found between the result and the destination tag. 
   
   
       158 . The system of  claim 151 , wherein said one or more circuits operable to discard the data packet, if a match is not found between the result and the destination tag. 
   
   
       159 . The system of  claim 151 , wherein the training sequence is periodic sequence with period N, where N is greater than a maximum channel length. 
   
   
       160 . The system of  claim 159 , wherein N=8 and the training sequence comprises a sequence of QPSK symbols. 
   
   
       161 . A system for processing a data packet, comprising:
 one or more circuits operable to receive a data packet having a preamble which includes a destination tag and a training sequence;   said one or more circuits operable to obtain a channel model using the training sequence;   said one or more circuits operable to decode the destination tag using the channel model to produce a result; and   said one or more circuits operable to compare the result with one or more received addresses.   
   
   
       162 . The system of  claim 161 , wherein said one or more circuits operable to produce the result by convolving the destination tag with the channel model. 
   
   
       163 . The system of  claim 161 , wherein said one or more circuits operable to receive multiple data packets, and wherein said one or more circuits operable to obtain a channel model for each of the multiple data packets. 
   
   
       164 . The system of  claim 163 , wherein the multiple data packets are received at one of a plurality of stations on a network, and wherein a training sequence in a preamble of each of the multiple data packets remains fixed for every station on the network. 
   
   
       165 . The system of  claim 161 , wherein the training sequence is repeated multiple times in the preamble. 
   
   
       166 . The system of  claim 165 , wherein the training sequence is repeated three times in the preamble. 
   
   
       167 . The system of  claim 161 , wherein said one or more circuits operable to process the data packet and use the processed data packet to refine the channel model for subsequently received packets, if a match is found between the result and the destination tag. 
   
   
       168 . The system of  claim 161 , wherein said one or more circuits operable to discard the data packet, if a match is not found between the result and the destination tag. 
   
   
       169 . The system of  claim 161 , wherein the training sequence is a periodic sequence with period N where N is greater than a maximum channel length. 
   
   
       170 . The system of  claim 169 , wherein N=8 and the training sequence comprises a sequence of QPSK symbols.