US2009050939A1PendingUtilityA1
Iii-nitride device
Individually held — no corporate assignee on recordPriority: Jul 17, 2007Filed: Jul 16, 2008Published: Feb 26, 2009
Est. expiryJul 17, 2027(~1 yrs left)· nominal 20-yr term from priority
Inventors:Michael A. Briere
H10D 62/8503H10D 88/00H10D 84/08H10D 64/411H10D 64/254H10D 62/405H10D 30/475H10D 30/015H10D 84/40
53
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Claims
Abstract
A III-nitride device that includes a silicon body having formed therein an integrated circuit and a III-nitride device formed over a surface of the silicon body.
Claims
exact text as granted — not AI-modified1 . A semiconductor device, comprising:
a support substrate that includes a silicon body having an integrated circuit formed therein; and a III-nitride body comprising a III-nitride semiconductor device formed over a surface of said silicon body.
2 . The device of claim 1 , wherein said III-nitride body includes a III-nitride heterojunction comprised of a first III-nitride layer of one band gap and a second III-nitride layer of another band gap formed over said first III-nitride layer.
3 . The device of claim 2 , wherein said III-nitride body includes a buffer layer interposed between said III-nitride heterojunction and said silicon body.
4 . The device of claim 1 , further comprising another silicon body and an insulation body interposed between said silicon body and said another silicon body.
5 . The device of claim 4 , wherein said silicon body is comprised of (111) silicon.
6 . The device of claim 4 , wherein said another silicon body is comprised of (1 11 ) silicon.
7 . The device of claim 4 , wherein said another silicon body is comprised of (100) silicon.
8 . The device of claim 4 , wherein said insulation body is comprised of silicon dioxide.
9 . The device of claim 4 , wherein said insulation body is between 0.1 to 2 microns thick.
10 . The device of claim 4 , wherein said insulation body is about 0.5 microns thick.
11 . The device of claim 4 , wherein said insulation body binds said first silicon body to said second silicon body.
12 . The device of claim 4 , wherein said silicon body is N++ doped.
13 . The device of claim 4 , wherein said silicon body is P++ doped.
14 . The device of claim 1 , wherein said silicon body includes an epitaxially formed portion.
15 . The device of claim 1 , wherein said III-nitride body includes a power semiconductor device and said integrated circuit formed in said silicon body comprises logic devices for operating said power semiconductor device.
16 . The device of claim 15 , further comprising a via through said III-nitride body reaching said silicon body, and a conductor disposed within said via connecting an electrode of said power semiconductor device to said another silicon body.
17 . The device of claim 1 , further comprising an insulation body formed over said silicon body and said III-nitride body, said insulation body including a via, said via including a conductive body connecting said IC to said III-nitride body.Join the waitlist — get patent alerts
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