Semiconductor light emitting device

Abstract

A semiconductor light emitting device comprises an element that emits light and a substrate on a main surface of which the element is mounted. The main surface of the substrate composed of two areas, (i) a mount area which is rectangle and on which the element is mounted, and (ii) a pad area that is equipped with a pad for wire bonding. The pad area is contiguous to the mount area on one side of the mount area, and the pad area decreases in width continuously or stepwise in a direction away from the one side.

1 - 9 . (canceled) 
   
   
       10 . A method for manufacturing a plurality of semiconductor light emitting devices, each of the semiconductor light emitting devices including an element that emits light; and a substrate on a main surface of which the element is mounted, wherein the main surface has (i) a mount area which is a rectangle and on which the element is mounted, and has (ii) a pad area that has a pad for wire bonding, wherein the pad area is contiguous to the mount area on one side of the mount area, and the pad area decreases in width continuously or stepwise in a direction away from the one side, said method comprising:
 an array substrate generating step for generating an array substrate in which substrates are arranged in a unique arrangement pattern;   a die bonding step for bonding elements respectively on the substrates arranged in the array substrate, by die bonding; and   a cutting step for cutting the array substrate into individual semiconductor light emitting devices by dicing, wherein   in the arrangement pattern, a side of the mount area that is opposite to the one side is adjoined by a side of another mount area for another element, with two elements on the mount area and said another mount area adjoining back to back.   
   
   
       11 . The method of  claim 10  further including:
 an applying step, between the die bonding step and the cutting step, for applying the phosphor to the elements in a unique application pattern, wherein   in the application pattern, the phosphor is applied collectively to the two elements that are adjoining back to back centering on the adjoining sides.   
   
   
       12 . The method of  claim 10 , wherein
 in the die bonding step, an electrode that is included in the element and is connected to the pad is positioned substantially in a center of one of two sides of the mount area that are connected to the one side, and such that all of the elements face the same direction.   
   
   
       13 . A method for manufacturing a plurality of semiconductor light emitting devices, each of the semiconductor light emitting devices including an element that emits light; and a substrate on a main surface of which the element is mounted, wherein the main surface has (i) a mount area which is a rectangle and on which the element is mounted, and has (ii) a pad area that has a pad for wire bonding, wherein the pad area is contiguous to the mount area on one side of the mount area, and the pad area decreases in width continuously or stepwise in a direction away from the one side, said method comprising:
 an array substrate generating step for generating an array substrate in which substrates are arranged in a unique arrangement pattern;   a mount step for mounting elements respectively on the substrates arranged in the array substrate; and   a cutting step for cutting the array substrate into individual semiconductor light emitting devices by dicing, wherein   in the arrangement pattern, (i) even number rows in which substrates that each have a mount area on the left and a pad area on the right are connected with each other in a left-right direction and (ii) odd number rows in which substrates that each have a mount area on the right and a pad area on the left are connected with each other in a left-right direction, are aligned alternately.   
   
   
       14 . The method of  claim 13  further includes:
 an applying step, between the die bonding step and the cutting step, for applying the phosphor to the elements in a unique application pattern, wherein   in the arrangement pattern, there are margins between two elements in each pair adjoining in a row direction, and   in the application pattern, deviation of an application width is controlled by the margins.   
   
   
       15 . The method of  claim 13 , wherein
 in the die bonding step, an electrode that is included in the element and is connected to the pad is positioned substantially in a center of one of two sides of the mount area that are connected to the one side, and such that all of the elements face the same direction.