Wafer manufacturing method, polishing apparatus, and wafer

Abstract

The present invention provides a wafer manufacturing method and a wafer polishing apparatus which enable control of sags in a periphery of a wafer and improvement of nanotopology values thereof that is strongly required recently, and a wafer. In a polishing process for making a mirror surface of the wafer, a back surface of the wafer is polished to produce a reference plane thereof.

1 - 11 . (canceled) 
     
     
         12 . A wafer with at least one mirror polished surface,
 wherein one main surface of the wafer has a configuration that an SFQRmax is 0.10 μm or less,   wherein said wafer has no inflection point from the central portion of the wafer to 2 mm from the peripheral edge of the wafer, and   wherein a front surface of the wafer is divided into a plurality of 2 mm×2 mm square areas, a PV value of each of the areas is evaluated, and the maximum PV value among the PV values for all evaluated areas is 20 nm or less.   
     
     
         13 . A wafer with at least one mirror polished surface,
 wherein one main surface of the wafer has a configuration that an SFQRmax is 0.10 μm or less,   wherein said wafer has no inflection point from the central portion of the wafer to 2 mm from the peripheral edge of the wafer, and   wherein a front surface of the wafer is divided into a plurality of 2 mm×2 mm square areas, a PV value of each of the areas is evaluated, and the maximum PV value among the PV values for all evaluated areas is 18 nm or less.   
     
     
         14 . The wafer according to  claim 12 , wherein a back surface of the wafer is mirror polished. 
     
     
         15 . The wafer according to  claim 13 , wherein a back surface of the wafer is mirror polished.