Plasma display and driving method thereof

Abstract

A plasma display and a method of driving the plasma display. The plasma display includes a plasma display panel including a plurality of discharge cells corresponding to sustain electrodes and scan electrodes. A first transistor is coupled between a first power source and a node coupled to the scan electrodes. A second transistor and a diode are coupled in series between a second power source and the node. The first and second transistors are alternately turned on during a sustain period, and the diode is configured to interrupt a current flowing from the second power source to the node.

1 . A plasma display comprising:
 a plasma display panel configured to be driven during a plurality of subfields, each subfield comprising a sustain period, the plasma display panel comprising a plurality of discharge cells corresponding to sustain electrodes and scan electrodes;   a first power source for supplying a first voltage;   a second power source for supplying a second voltage that is lower than the first voltage;   a first transistor coupled between a node coupled to the scan electrodes and the first power source; and   a second transistor and a first diode coupled in series between the second power source and the node,   wherein the first transistor and the second transistor are alternately turned on during the sustain period, and the first diode is configured to interrupt a current flowing from the second power source to the node.   
   
   
       2 . The plasma display of  claim 1 , further comprising:
 a capacitor for supplying a voltage between the first voltage and the second voltage;   an inductor having a first terminal coupled to the node; and   a switching unit coupled to a second terminal of the inductor to form a current path from the capacitor to the node and a current path from the node to the capacitor.   
   
   
       3 . The plasma display of  claim 2 , wherein a cathode of the first diode is coupled to the second power source, an anode of the first diode is coupled to a first terminal of the second transistor, and a second terminal of the second transistor is coupled to the node. 
   
   
       4 . The plasma display of  claim 3 , further comprising:
 a second diode coupled between the second terminal of the inductor and the first power source; and   a third diode coupled between the second terminal of the inductor and the first terminal of the second transistor.   
   
   
       5 . The plasma display of  claim 1 , further comprising:
 a capacitor for supplying a voltage between the first voltage and the second voltage;   an inductor having a first terminal coupled to the capacitor; and   a switching unit coupled between a second terminal of the inductor and the node to form a current path from the inductor to the node and a current path from the node to the inductor.   
   
   
       6 . The plasma display of  claim 5 , further comprising:
 a second diode coupled between the second terminal of the inductor and the first power source; and   a third diode coupled between the second terminal of the inductor and the second power source.   
   
   
       7 . The plasma display of  claim 1 , further comprising:
 a capacitor for supplying a voltage between the first voltage and the second voltage;   a first inductor and a third transistor coupled in series between the capacitor and the node; and   a second inductor and a fourth transistor coupled in series between the capacitor and the node.   
   
   
       8 . The plasma display of  claim 7 , further comprising:
 a second diode coupled between the first power source and a second node coupled to the first inductor and the third transistor; and   a third diode coupled between the second power source and a third node coupled to the second inductor and the fourth transistor.   
   
   
       9 . The plasma display of  claim 1 , further comprising:
 a third power source for supplying a third voltage that is lower than the second voltage; and   a third transistor coupled between the third power source and the node,   wherein each subfield further comprises an address period, and the third voltage is applied to the scan electrodes during the address period.   
   
   
       10 . The plasma display of  claim 9 , wherein each subfield further comprises a reset period, and the third transistor is configured to gradually decrease a voltage at the scan electrodes during the reset period. 
   
   
       11 . The plasma display of  claim 1 , wherein each subfield further comprises a reset period, and the first transistor is configured to gradually increase a voltage at the scan electrodes during the reset period. 
   
   
       12 . A plasma display comprising:
 a plasma display panel configured to be driven during a plurality of subfields, each subfield comprising an address period and a sustain period, the plasma display panel comprising a plurality of discharge cells corresponding to sustain electrodes and scan electrodes;   a first power source for supplying a first voltage;   a second power source for supplying a second voltage that is higher than the first voltage;   a first transistor coupled between a node coupled to the scan electrodes and the first power source; and   a second transistor and a first diode coupled in series between the second power source and the node,   wherein the first transistor is turned on during the address period to apply the first voltage to the scan electrodes through the node,   the second transistor is turned on during a part of the sustain period to apply the second voltage to the scan electrodes through the node, and   the first diode is configured to interrupt a current flowing from the second power source to the node.   
   
   
       13 . The plasma display of  claim 12 , further comprising:
 a third power source for supplying a third voltage that is higher than the second voltage; and   a third transistor coupled between the third power source and the node,   wherein the second and third transistors are alternately turned on during the sustain period.   
   
   
       14 . The plasma display of  claim 12 , further comprising a Zener diode and a fourth transistor coupled in series between the node and the first power source,
 wherein each subfield further comprises a reset period, and the fourth transistor is configured to decrease a voltage at the scan electrodes to a fourth voltage that is higher than the first voltage during the reset period.   
   
   
       15 . A driving method of a plasma display comprising a plasma display panel configured to be driven during a plurality of subfields, each subfield comprising an address period and a sustain period, the plasma display panel comprising a plurality of discharge cells corresponding to sustain electrodes and scan electrodes, the driving method comprising:
 sequentially applying a first voltage to the plurality of scan electrodes during the address period;   alternately applying a second voltage and a third voltage to the plurality of scan electrodes during the sustain period, the third voltage being lower than the second voltage and higher than the first voltage; and   interrupting a current path from a second power source to a first power source during the address period by configuring a diode coupled between the first power source for supplying the first voltage and the second power source for supplying the second voltage.   
   
   
       16 . The driving method of  claim 15 , wherein:
 the sequentially applying the first voltage comprises turning on a first transistor coupled between a node coupled to the plurality of scan electrodes and the first power source for supplying the first voltage;   the alternately applying the second voltage and the third voltage comprises alternately turning on a second transistor and a third transistor to apply the second voltage and the third voltage, respectively;   the second transistor is coupled between the node and the second power source for supplying the second voltage; and   the third transistor is coupled between the node and a third power source for supplying the third voltage.