Method for preparing dynamic random access memory structure

Abstract

A method for preparing a dynamic random access memory structure, comprising steps of forming a bottom conductive region in a substrate, removing a predetermined portion of the substrate to form a plurality of pillars having a bottom end lower than a bottom surface of the bottom conductive region, forming a first oxide layer on the substrate and below the bottom conductive region in the pillar, forming a conductive block between two adjacent pillars to electrically connect the two bottom conductive regions in the two adjacent pillars, forming a second oxide layer covering the conductive block, forming a gate oxide layer on a sidewall of the pillar, forming a gate structure on a surface of the gate oxide layer; and forming an upper conductive region on a top portion of the pillar.

1 . A method for preparing a dynamic random access memory structure, comprising steps of:
 forming a bottom conductive region in a substrate;   removing a predetermined portion of the substrate to form a plurality of pillars having a bottom end lower than a bottom surface of the bottom conductive region;   forming a first oxide layer on the substrate and below the bottom conductive region in the pillar;   forming a conductive block between two adjacent pillars to electrically connect the two bottom conductive regions in the two adjacent pillars;   forming a second oxide layer covering the conductive block;   forming a gate oxide layer on a sidewall of the pillar;   forming a gate structure on a surface of the gate oxide layer; and   forming an upper conductive region on a top portion of the pillar.   
   
   
       2 . The method for preparing a dynamic random access memory structure of  claim 1 , wherein the step of forming a bottom conductive region in a substrate is implanting ions into the substrate. 
   
   
       3 . The method for preparing a dynamic random access memory structure of  claim 1 , wherein the step of removing a predetermined portion of the substrate to form a plurality of pillars comprises:
 forming a mask layer on the substrate; and   performing an etching process to remove the substrate not covered by the mask layer until the bottom end of the pillar is lower than the bottom surface of the bottom conductive region.   
   
   
       4 . The method for preparing a dynamic random access memory structure of  claim 1 , wherein the step of forming a first oxide layer on the substrate and below the bottom conductive region in the pillar comprises:
 forming a collar dielectric layer encapsulating a predetermined portion of the pillar;   performing a thermal oxidation process to form the first oxide layer on the substrate and in the pillar not covered by the collar dielectric layer; and   removing the collar dielectric layer.   
   
   
       5 . The method for preparing a dynamic random access memory structure of  claim 4 , wherein the collar dielectric layer encapsulates a portion of the sidewall of the pillar above the bottom surface of the bottom conductive region. 
   
   
       6 . The method for preparing a dynamic random access memory structure of  claim 1 , wherein the step of forming a gate structure on the surface of the gate oxide layer comprises:
 forming a polysilicon layer on the substrate; and   performing an anisotropic etching process to form the gate structure having a spacer profile.   
   
   
       7 . The method for preparing a dynamic random access memory structure of  claim 1 , further comprising a step of forming a conductive block between two adjacent pillars to electrically connect the two gate structures in the two adjacent pillars. 
   
   
       8 . The method for preparing a dynamic random access memory structure of  claim 1 , wherein the step of forming an upper conductive region on a top portion of the pillar is implanting ions into the top portion of the pillar. 
   
   
       9 . A method for preparing a dynamic random access memory structure, comprising steps of:
 preparing a substrate having a plurality of pillars;   forming a first oxide layer on the substrate and in the pillar;   forming a conductive block between the two pillars, the conductive block having a top end higher than the first oxide layer in the pillar;   forming at least one bottom conductive region on the first oxide layer in the pillar;   forming a second oxide layer covering the conductive block;   forming a gate oxide layer on a sidewall of the pillar;   forming a gate structure on a surface of the gate oxide layer; and   forming an upper conductive region on a top portion of the pillar.   
   
   
       10 . The method for preparing a dynamic random access memory structure of  claim 9 , wherein the step of forming a first oxide layer on the substrate and in the pillar comprises:
 forming a collar dielectric layer encapsulating a predetermined portion of the pillar;   performing a thermal oxidation process to form the first oxide layer on the substrate and in the pillar not covered by the collar dielectric layer; and   removing the collar dielectric layer.   
   
   
       11 . The method for preparing a dynamic random access memory structure of  claim 9 , wherein the conductive block is made of polysilicon, and the step of forming at least one bottom conductive region on the first oxide layer in the pillar is performing a thermal treating process to diffuse ions from the conductive block into the pillar to form the bottom conductive region. 
   
   
       12 . The method for preparing a dynamic random access memory structure of  claim 9 , wherein the step of forming a gate structure on a surface of the gate oxide layer comprises:
 forming a polysilicon layer on the substrate; and   performing an anisotropic etching process to form the gate structure having a spacer profile.   
   
   
       13 . The method for preparing a dynamic random access memory structure of  claim 9 , further comprising a step of forming a conductive block between two adjacent pillars to electrically connect the two gate structures in the two adjacent pillars. 
   
   
       14 . The method for preparing a dynamic random access memory structure of  claim 9 , wherein the step of forming an upper conductive region on a top portion of the pillar is implanting ions into the top portion of the pillar.