US2009072221A1PendingUtilityA1

Nitride semiconductor device and method for fabricating the same

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Assignee: PANASONIC CORPPriority: May 25, 2005Filed: Nov 6, 2008Published: Mar 19, 2009
Est. expiryMay 25, 2025(expired)· nominal 20-yr term from priority
H10H 20/825H10H 20/812H01S 5/34333B82Y 20/00H01S 5/0213H01S 2301/173H01S 2304/04
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Claims

Abstract

A nitride semiconductor device comprises: a well layer of nitride semiconductor containing In and Ga; barrier layers of nitride semiconductor sandwiching the well layer, containing Al and Ga, and having a larger band gap energy than the well layer; and a thin film layer provided between the well layer and the barrier layer. The thin film layer is formed during lowering of the substrate temperature after formation of the barrier layer or during elevation of the substrate temperature after formation of the well layer.

Claims

exact text as granted — not AI-modified
1 . A nitride semiconductor device comprising:
 a substrate;   a well layer of nitride semiconductor provided above the substrate and containing In and Ga;   a plurality of barrier layers of nitride semiconductor provided above the substrate so that they sandwich the well layer to construct a quantum well, containing Al and Ga, and having larger band gap energies than the well layer; and   a thin film layer of nitride semiconductor which is provided at least at either a position located on one of the plurality of barrier layers and under the well layer or a position located on the well layer and under another one of the plurality of barrier layers, and which has a band gap energy larger than that of the well layer and smaller than those of the barrier layers.   
     
     
         2 . The device of  claim 1 , wherein the thin film layer is provided at a position located on one of the plurality of barrier layers and under the well layer. 
     
     
         3 . The device of  claim 1 , wherein the thin film layer is provided at a position located on the well layer and under another one of the plurality of barrier layers. 
     
     
         4 . The device of  claim 1 , wherein the thin film layer is provided at both of a position located on one of the plurality of barrier layers and under the well layer and a position located on the well layer and under another one of the plurality of barrier layers. 
     
     
         5 . The device of  claim 1 , wherein a quantum well formed of the well layer, the thin film layer, and the plurality of barrier layers is stacked repeatedly for multiple cycles. 
     
     
         6 . The device of  claim 1 , wherein the thin film layer has a thickness of 2 nm or smaller. 
     
     
         7 . The device of  claim 1 , wherein the thin film layer is made of GaN. 
     
     
         8 . The device of  claim 1 , wherein the well layer is made of In x Al y Ga 1-x-y N (0<x<1, 0<y<1, and 0<x+y<1), and the barrier layer is made of In w Al z Ga 1-w-z N (0≦w<1, 0<z<1, and 0<z+w<1). 
     
     
         9 - 16 . (canceled)

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