Semiconductor component comprising copper metallizations

Abstract

A semiconductor component having improved thermomechanical durability has in a semiconductor substrate at least one cell comprising a first main electrode zone, a second main electrode zone and a control electrode zone lying in between. For making contact with the main electrode zone, at least one metallization layer composed of copper or a copper alloy is provided which is connected to at least one bonding electrode which likewise comprises copper or a copper alloy.

1 . A semiconductor component comprising:
 semiconductor substrate; and   at least one cell formed in the substrate and comprising
 a first main electrode zone, 
 a second main electrode zone, 
 a control electrode zone disposed between the first and second main electrode zones, and 
 a first metallization layer comprising at least one of copper or a copper alloy and connected to at least one of the first and second main electrode zones and to at least one bonding electrode comprising at least one of copper or a copper alloy. 
   
     
     
         2 . The semiconductor component according to  claim 1 , further comprising an auxiliary layer arranged between the at least one bonding electrode and the first metallization layer, wherein the auxiliary layer is harder than the first metallization layer. 
     
     
         3 . The semiconductor component according to  claim 2 , wherein the auxiliary layer comprises at least one selected from the group consisting of tungsten, nickel, a tungsten alloy, a cobalt alloy and a nickel alloy. 
     
     
         4 . The semiconductor component according to  claim 1 , comprising a second metallization layer comprising at least one of copper or a copper alloy, wherein a thickness of the first metallization layer is greater than a thickness of the second metallization layer. 
     
     
         5 . The semiconductor component according to  claim 1 , wherein the first metallization layer is disposed above the semiconductor substrate and comprises a plurality of first islands, wherein ones of the plurality of first islands are arranged above and electrically connected to ones of the first and second main electrode zones having the same contours. 
     
     
         6 . The component according to  claim 5 , further comprising a second metallization layer disposed above the first metallization layer and comprising a plurality of second islands, wherein the second islands are electrically connected to the first islands, and wherein the contours of the second islands are different from the contours of the first islands. 
     
     
         7 . The semiconductor component according to  claim 1 , further comprising a plurality of metallization layers, wherein at least one metallization layer comprises a plurality of islands, wherein at least one of the plurality of islands has lower connection regions on an underside facing the semiconductor substrate and upper connection regions on a top side remote from the semiconductor substrate, wherein the upper connection regions and the lower connection regions are arranged in a manner offset with respect to one another, and wherein the at least one of the plurality of islands has a width that increases in a direction from the lower connection regions to the upper connection regions. 
     
     
         8 . The semiconductor component according to  claim 1 , further comprising a plurality of metallization layers, wherein a topmost metallization layer connected to at least one bonding electrode comprises a plurality of strips extending parallel to one another, and wherein an underlying metallization layer comprises a plurality of strips extending parallel to one another and substantially perpendicular to the strips of the topmost metallization layer. 
     
     
         9 . The semiconductor component according to  claim 1 , wherein the at least one cell is a field effect transistor comprising a drain region and a source region, wherein the drain region and the source region are arranged on a side of the semiconductor substrate facing the first metallization layer. 
     
     
         10 . The semiconductor component according to  claim 1 , wherein the at least one cell is a vertical field effect transistor comprising a source region and a drain region, wherein the source region is arranged on a side of the semiconductor substrate facing the first metallization layer, and the drain region is arranged in a layer of the semiconductor substrate that is further away from the first metallization layer, and wherein the drain region is connected via a doped region within the semiconductor substrate to at least one of the first and second main electrode zones arranged on a side of the semiconductor substrate facing the first metallization layer. 
     
     
         11 . The semiconductor component according to  claim 1 , wherein the first and second main electrode zones are connected via plated-through holes comprising at least one of copper or a copper alloy to a metallization layer comprising at least one of copper or a copper alloy. 
     
     
         12 . The semiconductor component according to  claim 1 , further comprising a second metallization layer comprising at least one of copper or a copper alloy, and wherein the first and second metallization layers are connected via plated-through holes comprising at least one of copper or a copper alloy. 
     
     
         13 . The semiconductor component according to  claim 11 , wherein
 the plated-through holes composed of copper or a copper alloy are formed integrally with the metallization layer arranged on the side remote from the semiconductor substrate.   
     
     
         14 . The semiconductor component according to  claim 1 , comprising a plurality of metallization layers, wherein at least three of the plurality of metallization layers have a first thickness and comprise at least one of copper or a copper alloy, and wherein another of the plurality of metallization layers is arranged above the at least three of the plurality of metallization layers and has a second thickness greater than the first thickness and comprises at least one of copper or a copper alloy, and wherein the another of the plurality of metallization layers is connected to the at least one bonding electrode. 
     
     
         15 . The semiconductor component according to  claim 1 , further comprising a power semiconductor component and a logic semiconductor component. 
     
     
         16 . The semiconductor component according to  claim 1 , further comprising a plurality of elongate first main electrode zones and a plurality of elongate second main electrode zones arranged alternately and parallel to one another, wherein the plurality of elongate first main electrode zones are each respectively connected to one of a plurality of first lower islands and the plurality of elongate second main electrode zones are each respectively connected to one of plurality of second lower islands, and wherein a first collective island is transversely arranged over the first and second lower islands and is connected to the first lower islands, and wherein a second collective island is connected to the second lower islands, and wherein the pluralities of first and second lower islands and the first and second collective islands comprise sections of metallization layers, wherein longitudinal sections of the pluralities of first and second lower islands covered by and connected to the respective first and second collective islands are not more than about four times as wide as the pluralities of the first and second main electrode zones respectively connected to the first and second lower islands, and wherein longitudinal sections of the pluralities of first and second lower islands covered by and not connected to the respective first and second collective islands are at least about five times as wide as the pluralities of first and second main electrode zones respectively connected to the first and second lower islands. 
     
     
         17 . The semiconductor component according to  claim 16 , wherein longitudinal sections of the pluralities of first and second lower islands which are covered by and not connected to the respective first and second collective islands are at least about eight times as wide as the pluralities of first and second main electrode zones respectively connected to the first and second lower islands. 
     
     
         18 . The semiconductor component according to  claim 16 , wherein longitudinal sections of the pluralities of first and second lower islands covered by and connected to the respective first and second collective islands are not more than about twice as wide as the pluralities of first and second main electrode zones respectively connected to the first and second lower islands. 
     
     
         19 . The semiconductor component according to  claim 16 , wherein longitudinal sections of the pluralities of first and second lower islands covered by and connected to the respective first and second collective islands comprise interruptions in a longitudinal direction, and wherein silicon oxide regions are arranged between the interruptions. 
     
     
         20 . A semiconductor component comprising:
 a semiconductor substrate;   at least one cell formed on the semiconductor substrate and comprising
 a plurality of elongate first main electrode zones each respectively connected to one of a plurality of overlying first lower islands, 
 a plurality of elongate second main electrode zones arranged alternately with and parallel to the plurality of elongate first main electrode zones and each respectively connected to one of a plurality of overlying second lower islands, and 
 a control electrode zone arranged between the first and second main electrode zones; 
   a first collective island arranged transversely above the pluralities of overlying first and second lower islands and connected to the plurality of overlying first lower islands;   a second collective island arranged transversely above the pluralities of overlying first and second lower islands and connected to the plurality of overlying second lower islands;   wherein the pluralities of overlying first and second lower islands and the first and second collective islands comprise sections of metallization layers,   wherein longitudinal sections of the overlying first and second lower islands covered by and connected to the first and second collective islands are not more than about four times as wide as the pluralities of elongate first and second main electrode zones respectively connected to the pluralities of overlying first and second lower islands,   and wherein longitudinal sections of the overlying first and second lower islands covered by and not connected to the first and second collective islands are at least about five times as wide as the pluralities of elongate first and second main electrode zones respectively connected to the pluralities of overlying first and second lower islands.   
     
     
         21 . The semiconductor component according to  claim 20 , wherein longitudinal sections of the overlying first and second lower islands covered by and not connected to the first and second collective islands are at least about eight times as wide as the pluralities of elongate first and second main electrode zones respectively connected to the pluralities of overlying first and second lower islands. 
     
     
         22 . The semiconductor component according to  claim 20 , wherein longitudinal sections of the overlying first and second lower islands covered by and connected to the first and second collective islands are not more than about twice as wide as the pluralities of elongate first and second main electrode zones respectively connected to the pluralities of overlying first and second lower islands. 
     
     
         23 . The semiconductor component according to  claim 20 , wherein longitudinal sections of the overlying first and second lower islands covered by and connected to the first and second collective islands comprise interruptions in a longitudinal direction, and wherein a dielectric is arranged between the interruptions. 
     
     
         24 . The semiconductor component according to  claim 23 , wherein the dielectric comprises silicon oxide. 
     
     
         25 . The semiconductor component according to  claim 20 , wherein the first and second collective islands comprise bulges on their respective longitudinal sides, and wherein the bulges are respectively arranged above the pluralities of overlying first and second lower islands connected to the respective first and second collective islands. 
     
     
         26 . The semiconductor component according to  claim 25 , wherein the bulges extend in a direction toward the longitudinal sections of the respective overlying first and second lower islands which are covered by and not connected to the respective first and second collective islands.