Optoelectronic Semiconductor Chip

Abstract

An optoelectronic semiconductor chip comprises the following sequence of regions in a growth direction (c) of the semiconductor chip ( 20 ): a p-doped barrier layer ( 1 ) for an active region ( 2 ), the active region ( 2 ), which is suitable for generating electromagnetic radiation, the active region being based on a hexagonal compound semiconductor, and an n-doped barrier layer ( 3 ) for the active region ( 2 ). Also disclosed are a component comprising such a semiconductor chip, and a method for producing such a semiconductor chip.

1 . An optoelectronic semiconductor chip comprising the following sequence of regions in a growth direction of the semiconductor chip:
 a p-doped barrier layer for an active region;   the active region, which is suitable for generating electromagnetic radiation, the active region being based on a hexagonal compound semiconductor; and   an n-doped barrier layer for the active region.   
     
     
         2 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the active region is based on the III-V semiconductor material system In y Ga 1-x-y Al x N where 0≦x≦1, 0≦y≦1 and x+y≦1.   
     
     
         3 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which a diffusion barrier is arranged between p-doped barrier layer and the active region, said diffusion barrier being suitable for impeding the diffusion of a dopant into the active region.   
     
     
         4 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which a tunnel contact is disposed upstream of the p-doped barrier layer as seen in the growth direction.   
     
     
         5 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the tunnel contact has a highly n-doped region, a highly p-doped region and a diffusion barrier between the two regions of the tunnel contact.   
     
     
         6 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which an n-conducting region is disposed upstream of the tunnel contact as seen in the growth direction.   
     
     
         7 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which regions of the semiconductor chip are deposited onto a p-conducting growth substrate.   
     
     
         8 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the active region comprises a quantum well structure.   
     
     
         9 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the active region comprises precisely one single quantum well structure provided for generating radiation.   
     
     
         10 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which at least one quantum well structure which is not provided for generating radiation is disposed upstream of the quantum well structure provided for generating radiation, as seen in the growth direction.   
     
     
         11 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the quantum well structure which is not provided for generating radiation has a lower indium concentration than the quantum well structure provided for generating radiation.   
     
     
         12 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which a diffusion barrier containing a material from the III-V semiconductor material system Al x Ga 1-x N, where x≧0.2, is arranged between p-doped barrier layer and active region.   
     
     
         13 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the active region is based on the III-V semiconductor material system In y Ga 1-y N where 0≦y≦1.   
     
     
         14 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 having a growth substrate having a misorientation.   
     
     
         15 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the misorientation of the growth substrate is between 0.1° and 1.0°.   
     
     
         16 . The optoelectronic semiconductor chip as claimed in  claim 1 ,
 in which the growth substrate is thinned.   
     
     
         17 . The optoelectronic semiconductor chip as claimed in  claim 2 ,
 in which the semiconductor chip is grown in the Ga-face growth mode.   
     
     
         18 . An optoelectronic component,
 comprising an optoelectronic semiconductor chip as claimed in  claim 1 ,   having connections via which electrical contact can be made with the optoelectronic semiconductor chip.   
     
     
         19 . A method for producing an optoelectronic semiconductor chip as claimed in  claim 1 , comprising the steps of depositing the following regions onto a wafer in the order stated:
 a) a p-doped barrier layer for an active region of the semiconductor chip;   b) the active region, which is suitable for generating electromagnetic radiation, the active region being based on a hexagonal compound semiconductor, and   c) an n-doped barrier layer for the active region.   
     
     
         20 . The method as claimed in  claim 19 ,
 the active region, which is suitable for generating electromagnetic radiation, being based on the III-V semiconductor material system In y Ga 1-x-y Al x N where 0≦x≦1, 0≦y≦1 and x+y≦1.   
     
     
         21 . The method as claimed in  claim 19 , one of the following epitaxy methods being used: metal organic vapor phase epitaxy, molecular beam epitaxy, hybrid vapor phase epitaxy. 
     
     
         22 . The method as claimed in  claim 20 , the semiconductor chip being grown in the Ga-face growth mode.