DC Offset Cancellation Circuits and Methods

Abstract

Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

1 . A wireless receiver comprising:
 a mixer having a first input, a second input and an output, wherein the first input is coupled to a first amplifier to receive an amplified RF signal and the second input is coupled to a frequency synthesizer to receive a first signal having one of a plurality of frequencies; and   a plurality of parallel DC offset cancellation stages selectively coupled to the mixer output,   wherein if the first signal has a first frequency, then a first one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output, and if the first signal has a second frequency, then a second one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output.   
   
   
       2 . The wireless receiver of  claim 1  wherein, in a first state, at least one of the DC offset cancellation stages has a first low cutoff frequency and, in a second state, the at least one DC offset cancellation stage has a second low cutoff frequency less than the first low cutoff frequency. 
   
   
       3 . The wireless receiver of  claim 1  wherein each of the plurality of DC offset cancellation stages includes a switch and a capacitor. 
   
   
       4 . The wireless receiver of  claim 1  wherein the DC offset cancellation stages comprise high pass filters. 
   
   
       5 . The wireless receiver of  claim 4  wherein the high pass filters are configure to have a first cutoff frequency during a calibration phase and a second cutoff frequency during normal operation. 
   
   
       6 . The wireless receiver of  claim 4  wherein the high pass filters are configure to have a first cutoff frequency during a first portion of a symbol and a second cutoff frequency during a second portion of a symbol. 
   
   
       7 . A wireless receiver comprising a DC offset cancellation circuit, wherein the wireless receiver demodulates an RF signal using a plurality of different local oscillator frequencies at different times, and wherein the DC offset cancellation circuit stores a plurality of DC voltages corresponding to the plurality of different local oscillator frequencies. 
   
   
       8 . The wireless receiver of  claim 11  wherein the DC offset cancellation circuit is coupled between a mixer and a variable gain amplifier. 
   
   
       9 . The wireless receiver of  claim 12  wherein the variable gain amplifier includes at least one second DC offset cancellation circuit, wherein in the first state, the second DC offset cancellation circuit has a third low cutoff frequency greater than the first low cutoff frequency of the first DC offset cancellation circuit, and in the second state, the second DC offset cancellation circuit has a fourth low cutoff frequency less than the third low cutoff frequency. 
   
   
       10 . The wireless receiver of  claim 11  further comprising a variable gain amplifier comprising a fixed gain amplifier and variable attenuator, wherein the first DC cancellation circuit is coupled between the fixed gain amplifier and the variable attenuator. 
   
   
       11 . The wireless receiver of  claim 11  wherein the DC cancellation circuit includes a first and second parallel DC cancellation stages. 
   
   
       12 . A method comprising:
 receiving an RF signal at a first input of a mixer;   receiving a local oscillator signal at a second input of a mixer, the local oscillator signal having a first frequency;   generating a first signal at an output of the mixer;   coupling the first signal to a first DC offset cancellation stage;   changing the frequency of the local oscillator signal, and in accordance therewith, coupling the first signal to a second DC offset cancellation stage.   
   
   
       13 . The method of  claim 12  further comprising storing, in each DC offset cancellation stage, a DC offset voltage corresponding to a frequency of the local oscillator signal. 
   
   
       14 . A method of cancelling DC offset in a wireless receiver comprising:
 storing a first DC voltage when said wireless receiver demodulates an RF signal using a first local oscillator frequency; and   storing a second DC voltage when the wireless receiver demodulates an RF signal using a second local oscillator frequency.   
   
   
       15 . The method of  claim 14  wherein the wireless receiver generates one or more additional local oscillator frequencies for demodulating the RF signal, the method further comprising storing one or more DC additional offset voltages corresponding to the one or more additional local oscillator frequencies. 
   
   
       16 . The method of  claim 15  wherein the local oscillator frequencies change between different frequencies according to a pattern. 
   
   
       17 . The method of  claim 14  wherein the local oscillator frequencies change periodically. 
   
   
       18 . The method of  claim 14  further comprising configuring a DC cancellation circuit to have a first low cutoff frequency during a calibration cycle, and configuring the DC cancellation circuit to have a second low cutoff frequency during normal operation. 
   
   
       19 . The method of  claim 18  wherein the first low cutoff frequency is higher than the second low cutoff frequency. 
   
   
       20 . The method of  claim 14  further comprising configuring a DC cancellation circuit to have a first low cutoff frequency during a first portion of a symbol, and configuring the DC cancellation circuit to have a second low cutoff frequency during a second portion of a symbol.