Semiconductor device having three-dimensional stacked structure and method of fabricating the same

Abstract

A three-dimensional stacked structured semiconductor device comprising semiconductor circuit layers stacked on a support substrate, and a method of fabricating the device are provided. After fixing semiconductor chips 37 to a support substrate 31 with bump electrodes, gaps between the chips 37 are filled with an electrically insulative adhesive 38 . Then, by polishing the reverses of the chips 37 , the chips 37 are thinned to expose buried interconnections in the chips 37 , thereby forming a first semiconductor circuit layer L 1 . Next, after fixing semiconductor chips 43 to the first semiconductor circuit layer L 1 with bump electrodes 41 and 42 by way of an insulating layer 39 , gaps between the chips 43 are filled with an electrically insulative adhesive 44 . Then, by polishing the reverses of the chips 43 , the chips 43 are thinned to expose buried interconnections in the chips 43 , thereby forming a second semiconductor circuit layer L 2 . In a similar way, semiconductor chips 49 are fixed to the second semiconductor circuit layer L 2 by way of an insulating layer 45 , thereby forming a third semiconductor circuit layer L 3 . Dicing is performed as necessary. Thus, three-layer stacked structured semiconductor devices 30 A, 30 B, and 30 C are obtained.

1 . A semiconductor device having a three-dimensional stacked structure, comprising:
 a support substrate; and   a stacked structure comprising first to n-th circuit layers (n is an integer equal to 2 or greater) stacked in sequence from a bottom of the structure to a top thereof in a predetermined stacking direction and unified with an electrically insulative adhesive, the structure being fixed to the substrate at the bottom;   wherein adjoining ones of the circuit layers in the stacked structure are mechanically and electrically interconnected with each other by way of connecting portions formed between the adjoining circuit layers, and are electrically insulated from each other by the adhesive in a region other than the connecting portions;   each of the first to n-th circuit layers is formed to include at least one semiconductor circuit; and   at least one of the first to n-th circuit layers is such that a physical size of the semiconductor circuit included in the said circuit layer in a plane perpendicular to the stacking direction is smaller than a physical size of the said circuit layer in the plane, and a side face of the said semiconductor circuit is covered with the adhesive.   
     
     
         2 . The device according to  claim 1 , wherein a plurality of electrodes for external circuit connection are provided, the electrodes being located at the top of the stacked structure and electrically connected to at least one of the first to n-th circuit layers. 
     
     
         3 . The device according to  claim 1 , wherein in each of the connecting portions for mechanical and electrical interconnection between the adjoining ones of the circuit layers in the stacked structure, a conductive contact formed to protrude on the semiconductor circuit of one of the two adjoining circuit layers and a conductive contact formed to protrude on the semiconductor circuit of the other of the two adjoining circuit layers are mechanically connected; and
 a gap between the adjoining ones of the circuit layers in the stacked structure is filled with the adhesive.   
     
     
         4 . The device according to  claim 1 , wherein in each of the connecting portions for mechanical and electrical interconnection between the adjoining ones of the circuit layers in the stacked structure, a conductive contact is formed between the said circuit layers, and both ends of the conductive contact are mechanically connected to the adjoining circuit layers, respectively; and
 a gap between the adjoining ones of the circuit layers in the stacked structure is filled with the adhesive.   
     
     
         5 . The device according to  claim 1 , wherein at least one of the first to n-th circuit layers comprises a rigid member extending between a face of the said circuit layer and an opposing face of an adjoining one of the circuit layers or the substrate. 
     
     
         6 . The device according to  claim 1 , wherein at least one of the first to n-th circuit layers comprises a buried interconnection penetrating through the said circuit layer in the stacking direction; and
 electrical connection in the said circuit layer or to an adjoining one of the circuit layers is performed by using the buried interconnection.   
     
     
         7 . The device according to  claim 1 , wherein a whole sidewall of the stacked structure is covered with the adhesive. 
     
     
         8 . The device according to  claim 1 , wherein the circuit layer included in at least one of the first to n-th circuit layers is exposed from the adhesive covering a sidewall of the stacked structure. 
     
     
         9 . The device according to  claim 1 , wherein at least one of the first to n-th circuit layers comprises semiconductor circuits arranged at predetermined positions in a plane perpendicular to the stacking direction. 
     
     
         10 . The device according to  claim 9 , wherein the semiconductor circuits in the said circuit layer are electrically interconnected by way of a wiring layer. 
     
     
         11 . The device according to  claim 10 , wherein the wiring layer is located between the said circuit layer and the other circuit layer adjoining thereto. 
     
     
         12 . The device according to  claim 1 , wherein the semiconductor circuit included in at least one of the first to n-th circuit layers comprises at least one dummy semiconductor circuit. 
     
     
         13 . The device according to  claim 1 , wherein the substrate comprises an inner circuit or a wiring line, the inner circuit or the wiring line being electrically connected to at least one of the first to n-th circuit layers. 
     
     
         14 . The device according to  claim 1 , wherein the adhesive comprises a filler. 
     
     
         15 . The device according to  claim 1 , wherein the semiconductor circuit included in at least one of the first to n-th circuit layers comprises a redundant structure. 
     
     
         16 . A method of fabricating a semiconductor device having a three-dimensional stacked structure, said device comprising,
 a support substrate; and   a stacked structure comprising first to n-th circuit layers (n is an integer equal to 2 or greater) stacked in sequence from a bottom of the structure to a top thereof in a predetermined stacking direction and unified with an electrically insulative adhesive, the structure being fixed to the substrate at the bottom;   wherein at least one of the first to n-th circuit layers is such that a physical size of the semiconductor circuit included in the said circuit layer in a plane perpendicular to the stacking direction is smaller than a physical size of the said circuit layer in the said plane, and a side face of the said semiconductor circuit is covered with the adhesive;   said method comprising the steps of:   mechanically connecting at least one first semiconductor circuit to a surface of the support substrate at a predetermined position by way of first connecting portions;   filling a gap formed between the first semiconductor circuit and the substrate with a first electrically insulative adhesive, and curing the first adhesive;   polishing an opposite surface of the first semiconductor circuit to the substrate, where the gap is filled with the cured first adhesive, to adjust a thickness of the first semiconductor circuit to a predetermined value, thereby forming a first circuit layer constituting the stacked structure;   mechanically and electrically connecting at least one second semiconductor circuit to a surface of the first circuit layer at a predetermined position by way of second connecting portions;   filling a gap formed between the second semiconductor circuit and the first circuit layer with a second electrically insulative adhesive, and curing the second adhesive; and   polishing an opposite surface of the second semiconductor circuit to the substrate, where the gap is filled with the cured second adhesive, to adjust a thickness of the second semiconductor circuit to a predetermined value, thereby forming a second circuit layer constituting the stacked structure.   
     
     
         17 . The method according to  claim 16 , wherein by repeating the three steps for forming the second circuit layer (n−2) times, the first circuit layer comprising the at least one first semiconductor circuit, the second circuit layer comprising the at least one second semiconductor circuit, . . . , and an n-th circuit layer comprising at least one n-th semiconductor circuit are stacked on the substrate in this order, thereby forming the stacked structure. 
     
     
         18 . The method according to  claim 16 , further comprising a step of forming a plurality of electrodes for external circuit connection at predetermined positions on the n-th circuit layer;
 wherein the electrodes for external circuit connection are electrically connected to at least one of the first to n-th circuit layers.   
     
     
         19 . The method according to  claim 16 , wherein each of the second connecting portions used in the step of mechanically and electrically connecting the at least one second semiconductor circuit to the surface of the first circuit layer at the predetermined position comprises a conductive contact formed to protrude on the second semiconductor circuit and a conductive contact formed to protrude on the first circuit layer; and
 the first circuit layer and the at least one second semiconductor circuit are mechanically and electrically connected by mechanically connecting the contacts to each other directly or by way of a bonding metal.   
     
     
         20 . The method according to  claim 16 , wherein each of the second connecting portions used in the step of mechanically and electrically connecting the at least one second semiconductor circuit to the surface of the first circuit layer at the predetermined position comprises a conductive contact formed to protrude on the second semiconductor circuit or the first circuit layer;
 wherein the first circuit layer and the at least one second semiconductor circuit are mechanically and electrically connected by mechanically connecting each end of the contact to the first circuit layer and the at least one second semiconductor circuit, respectively.   
     
     
         21 . The method according to  claim 16 , wherein at least one of the first semiconductor circuit and the second semiconductor circuit comprises a rigid member protruding toward an opposing face of the substrate or the first circuit layer adjoining thereto; and
 the rigid member is used as a stopper for positioning the first semiconductor circuit and/or the second semiconductor circuit in the stacking direction.   
     
     
         22 . The method according to  claim 16  wherein at least one of the first semiconductor circuit and the second semiconductor circuit comprises a buried interconnection that does not penetrate through the said semiconductor circuit; and
 when the opposite surface of the said semiconductor circuit to the substrate is polished, the interconnection is turned to a penetrating state where the interconnection penetrates through the said semiconductor circuit.   
     
     
         23 . The method according to  claim 16 , wherein the first circuit layer includes a plurality of the first semiconductor circuits and the second circuit layer includes a plurality of the second semiconductor circuits. 
     
     
         24 . The method according to  claim 16 , wherein the first circuit layer has a physical size in a plane perpendicular to the stacking direction larger than a physical size of the at least one first semiconductor circuit in the plane;
 a side face of the first semiconductor circuit is covered with the first adhesive;   the second circuit layer has a physical size in a plane perpendicular to the stacking direction larger than a physical size of the at least one second semiconductor circuit in the plane; and   a side face of the second semiconductor circuit is covered with the second adhesive.   
     
     
         25 . The method according to  claim 16 , wherein filling the gap with the first or second adhesive is performed by spraying the first or second adhesive. 
     
     
         26 . The method according to  claim 16 , wherein filling the gap with the first or second adhesive is performed by immersing in a liquid adhesive the first semiconductor circuit fixed to the substrate or the second semiconductor circuit fixed to the first semiconductor circuit. 
     
     
         27 . The method according to  claim 16 , wherein filling the gap with the first or second adhesive is performed by immersing in said liquid adhesive the substrate and the first semiconductor circuit sandwiched by a pair of pressing members or the first and second semiconductor circuits sandwiched by a pair of pressing members. 
     
     
         28 . The method according to  claim 16 , wherein filling the gap with the first or second adhesive is performed by placing the substrate and the first semiconductor circuit or the first and second semiconductor circuits in a member having a closed space, and injecting the liquid adhesive into the space under pressure. 
     
     
         29 . The method according to  claim 16 , wherein the first semiconductor circuits or the second semiconductor circuits are regularly placed on the substrate or the first circuit layer and thereafter, gaps between the first semiconductor circuits or the second semiconductor circuits and their peripheries are coated with at least one of the first and second adhesives using a dispenser. 
     
     
         30 . The method according to  claim 16 . wherein when the first adhesive filled in the gaps are cured, a layer for preventing a warp of the substrate is placed on an opposite surface of the substrate to the first circuit layer. 
     
     
         31 . The method according to  claim 16 , wherein when the gaps are filled with the first adhesive and the first adhesive is cured, a warp preventing layer for preventing a warp of the substrate is placed on an opposite surface of the substrate to the first circuit layer. 
     
     
         32 . The method according to  claim 16  wherein when the gaps are filled with the first adhesive or the first adhesive is cured, a first warp preventing layer for preventing a warp of the substrate is placed on an opposite surface of the substrate to the first circuit layer; and
 when the gaps are filled with the second adhesive or the second adhesive is cured, a second warp preventing layer for preventing a warp of the substrate is placed on the first warp preventing layer.   
     
     
         33 . The method according to  claim 16 , further comprising a step of warping the substrate toward an opposite side to a warp of the substrate to be generated by curing of the first adhesive, which is performed after mechanically connecting the first semiconductor circuit to the substrate by way of the first connecting portions. 
     
     
         34 . The method according to  claim 16  wherein at least one of the first and second adhesives contains a filler. 
     
     
         35 . The method according to  claim 16  further comprising a step of dicing the substrate and the stacked structure along a cutting plane or planes parallel to the stacking direction to thereby form semiconductor devices. 
     
     
         36 . The method according to  claim 16  wherein the semiconductor circuit included in at least one of the first to n-th circuit layers comprises a redundant structure.