On-the-fly introduction of inter-channel delay in a pulse-width-modulation amplifier

Abstract

A multiple-channel audio processor ( 10 ) and an associated plurality of power stages ( 22 ) in an audio system are disclosed. The audio processor ( 10 ) includes a plurality of audio amplifier channels ( 22 ), each of which includes a pulse-code-modulation (PCM) to pulse-width-modulation (PWM) conversion function ( 25 ), which generates PWM signals for application to the plurality of power stages ( 22 ). The audio amplifier channels ( 20 ) each also include an interchannel delay function ( 28 ) for delaying the PWM edges relative to other channels ( 20 ), for reducing noise. The audio amplifier channels ( 20 ) each also include delay adjust circuitry ( 32 ) for gradually increasing and decreasing the interchannel delay of the channel ( 20 ) on startup and shutdown. This permits a single control terminal (VALID) at the processor to globally enable and disable all of the power stages ( 22 ).

1 . A method of controlling a digital audio system having a plurality of audio channels, each audio channel for driving a corresponding speaker with a pulse-width-modulated signal, via an associated power stage, to produce audible audio in an unmuted state, comprising the steps of:
 disabling each of the power stages to mute the system;   applying a start sequence of a plurality of pulse-width-modulated pulses to each of the power stages, the start sequence being substantially simultaneous at each of the power stages;   associating an interchannel delay value with each of the power stages;   applying, to each of the power stages, a first edge of a pulse-width-modulated pulse following the start sequence delayed by a first fraction of the interchannel delay value for that power stage; and   then applying, to each of the power stages, edges of the pulse-width-modulated pulse delayed by the interchannel delay value for that power stage.   
   
   
       2 . The method of  claim 1 , further comprising:
 after the step of applying the first edge and before the step of applying edges delayed by the interchannel delay value, then applying a second edge of a pulse-width-modulated pulse following the start sequence delayed by a second fraction of the interchannel delay value for that power stage.   
   
   
       3 . The method of  claim 1 , wherein the interchannel delay value can have a negative value, a positive value, or a zero value. 
   
   
       4 . The method of  claim 1 , further comprising:
 applying, to each of the power stages, a third edge of a pulse-width modulated pulse delayed by a third fraction of the interchannel delay value for that power stage;   then applying, to each of the power stages, at least one edge of a pulse-width-modulated pulse with no delay;   then applying a stop sequence of a plurality of pulse-width-modulated pulses to each of the power stages, the stop sequence being substantially simultaneous at each of the power stages; and   then disabling each of the power stages.   
   
   
       5 . The method of  claim 4 , further comprising:
 after the step of applying the third edge and before the step of applying the at least one edge with no delay, then applying a fourth edge of a pulse-width-modulated pulse following the start sequence delayed by a fourth fraction of the interchannel delay value for that power stage.   
   
   
       6 . A method of controlling a digital audio system having a plurality of audio channels, each audio channel for driving a corresponding speaker with a pulse-width-modulated signal, via an associated power stage, to produce audible audio in an unmuted state, comprising the steps of:
 disabling each of the power stages to mute the system;   first applying, to each of the power stages, inactive signals at first and second output lines;   then applying, to each of the power stages, active signals at the first and second output lines;   then applying, to each of the power stages, inactive signals at the first and second output lines; and   then applying, to each of the power stages, complementary signals at the first and second output lines.   
   
   
       7 . The method of  claim 6 , wherein the step of applying complementary signals applies at least a plurality of cycles of the complementary signals corresponding to a start sequence of a plurality of pulse-width-modulated pulses to each of the power stages, the start sequence being substantially simultaneous at each of the power stages. 
   
   
       8 . The method of  claim 6 , wherein each of the power stages comprise at least a pull-up transistor and a pull-down transistor coupled between a power supply voltage and a ground voltage, with a speaker coupled to a node between the pull-up transistor and the pull-down transistor, gate drive circuitry for controlling the pull-up and pull-down transistors responsive to decoding logic, and further comprise a bootstrapping capacitor coupled between the node and a power supply voltage; and wherein the step of then applying active signals to the first and second output lines turns on the pull-down transistor so that the bootstrapping capacitor charges. 
   
   
       9 . The method of  claim 6 , wherein each of the power stages comprise at least a pull-up transistor and a pull-down transistor coupled between a power supply voltage and a ground voltage, with a speaker coupled to a node between the pull-up transistor and the pull-down transistor, gate drive circuitry for controlling the pull-up and pull-down transistors directly responsive to the first and second output lines without decoding logic, and further comprise a bootstrapping capacitor coupled between the node and a power supply voltage and wherein the step of first applying inactive signals to the first and second output lines turns on the pull-down transistor so that the bootstrapping capacitor charges.