Floating Gate of Flash Memory Device and Method of Forming the Same

Abstract

Disclosed is a floating gate of a flash memory device, wherein a tunneling oxide layer is formed on a semiconductor substrate, and a floating gate is formed in the shape of a lens having a convex top surface.

1 . A floating gate of a flash memory device, comprising:
 a tunneling oxide layer on a semiconductor substrate;   a floating gate having a lens shape and a convex top surface;   a gate oxide on the floating gate; and   a concave control gate on the gate oxide.   
   
   
       2 . The nonvolatile memory device of  claim 1 , wherein the gate oxide and the control gate have a shape complementary to that of the floating gate. 
   
   
       3 . The nonvolatile memory device of  claim 1 , wherein the gate oxide and the control gate also have a shape effective to increase the capacitance or coupling ratio between the floating gate and the control gate, relative to an otherwise identical nonvolatile memory having a planar floating gate. 
   
   
       4 . The nonvolatile memory device of  claim 1 , wherein the floating gate has a width of from 45 nm to 150 nm. 
   
   
       5 . The nonvolatile memory device of  claim 4 , wherein the floating gate width is less than or equal to 100 nm. 
   
   
       6 . The nonvolatile memory device of  claim 2 , wherein the control gate has a width greater than that of the floating gate, and portions of the floating gate extend along sidewalls of the floating gate. 
   
   
       7 . A nonvolatile memory device, comprising:
 a tunnel oxide layer on a semiconductor substrate;   a floating gate on the tunnel oxide layer having a convex top surface;   a gate oxide on the floating gate; and   a control gate on the gate oxide.   
   
   
       8 . The nonvolatile memory device of  claim 8 , wherein the floating gate has a shape effective to increase a capacitance or a coupling ratio between the floating gate and the control gate. 
   
   
       9 . The nonvolatile memory device of  claim 9 , wherein the gate oxide and the control gate have a shape complementary to that of the floating gate. 
   
   
       10 . The nonvolatile memory device of  claim 8 , wherein the gate oxide and the control gate also have a shape effective to increase the capacitance or coupling ratio between the floating gate and the control gate, relative to an otherwise identical nonvolatile memory having a planar floating gate. 
   
   
       11 . The nonvolatile memory device of  claim 8 , wherein the floating gate has a width of from 45 nm to 150 nm. 
   
   
       12 . The nonvolatile memory device of  claim 12 , wherein the floating gate width is less than or equal to 100 nm. 
   
   
       13 . The nonvolatile memory device of  claim 9 , wherein the control gate has a width greater than that of the floating gate, and portions of the floating gate extend along sidewalls of the floating gate.