Integrated circuit device and method for its production

Abstract

An integrated circuit device includes a semiconductor body fitted with a first electrode and a second electrode on opposite surfaces. A control electrode on an insulating layer controls channel regions of body zones for a current flow between the two electrodes. A drift section adjoining the channel regions comprises drift zones and charge compensation zones. A part of the charge compensation zones includes conductively connected charge compensation zones electrically connected to the first electrode. Another part includes nearly-floating charge compensation zones, so that an increased control electrode surface has a monolithically integrated additional capacitance C ZGD in a cell region of the semiconductor device.

1 . An integrated circuit device comprising:
 a semiconductor body with a first electrode and a second electrode located on opposite surfaces of the semiconductor body;   a control electrode on an insulating layer, which controls channel regions of body zones in the semiconductor body for a current flow between the two electrodes;   a drift section adjoining the channel regions and comprising drift zones and charge compensation zones; and   a part of the charge compensation zones comprising conductively connected charge compensation zones electrically connected to the first electrode and another part comprising nearly-floating charge compensation zones, so that an increased control electrode surface has a monolithically integrated additional capacitance C ZGD  in a cell region of the semiconductor device.   
   
   
       2 . The integrated circuit device of  claim 1 , wherein the drift zones comprise a first conduction type and the charge compensation zones comprise a conduction type complementing the first conduction type. 
   
   
       3 . The integrated circuit device of  claim 1 , wherein the first electrode is a source electrode, the second electrode is a drain electrode and the control electrode is a gate electrode of a power MOSFET device. 
   
   
       4 . The integrated circuit device of  claim 1 , wherein the nearly-floating charge compensation zones are located below a conductive layer connected to control electrode potential to provide additional capacitance in the semiconductor body and are insulated from the said conductive layer by an insulating layer comprising the dielectric of the additional capacitance. 
   
   
       5 . The integrated circuit device of  claim 1 , wherein the insulating layer comprising the dielectric of the additional capacitance and located above the nearly-floating charge compensation zones is thicker than the insulating layer towards the channel region. 
   
   
       6 . The integrated circuit device of  claim 1 , wherein the nearly-floating charge compensation zones are surrounded by a trench filled with dielectric near the surface of the semiconductor body. 
   
   
       7 . The integrated circuit device of  claim 1 , wherein the region of the nearly-floating charge compensation zones is additionally covered by a metal layer with the potential of the first electrode and is insulated against the electrically conductive layer of the additional capacitance by an intermediate insulating layer. 
   
   
       8 . The integrated circuit device of  claim 1 , wherein the nearly-floating charge compensation zones are electrically connected to one another or to a body zone or to one of the conductively connected charge compensation zones by a layer of the second conduction type within the semiconductor. 
   
   
       9 . The integrated circuit device of  claim 1 , wherein the conductively connected and the nearly-floating charge compensation zones are arranged in a checkerboard pattern within the cell region, and wherein the cell region is surrounded by conductively connected charge compensation zones. 
   
   
       10 . The integrated circuit device of  claim 1 , wherein contiguous groups of nearly-floating charge compensation zones are surrounded by conductively connected charge compensation zones. 
   
   
       11 . The integrated circuit device of  claim 1 , wherein conductively connected charge compensation zones are doped more highly near the surface than in the remaining region of the drift section and the nearly-floating charge compensation zones do not comprise this more highly doped region. 
   
   
       12 . An integrated circuit device comprising:
 a semiconductor body with a first electrode and a second electrode located on opposite surfaces of the semiconductor body;   a control electrode on an insulating layer to control channel regions in adjacent body zones in the semiconductor body for a current flow between the two electrodes;   a drift section adjoining the channel between the two electrodes and comprising drift zones and charge compensation zones,   the insulating layer being thicker in the region between the control electrode and the drift zones than in the region between the control electrode and the channel regions of the body zone.   
   
   
       13 . The integrated circuit device of  claim 12 , wherein the thicker insulating layer is arranged in strips between rows or rows of body zones. 
   
   
       14 . The integrated circuit device of  claim 12 , wherein the thicker insulating layer is evenly distributed between groups of body zones in the cell region of the semiconductor device. 
   
   
       15 . The integrated circuit device of  claim 12 , wherein the thicker insulating layer partially extends across the body zones for the adjustment of a transistor transconductance. 
   
   
       16 . The integrated circuit device of  claim 12 , wherein the control electrode is an insulated gate electrode of a power MOSFET or IGBT and wherein the second electrode is a drain electrode of a MOSFET or the collector electrode of an IGBT. 
   
   
       17 . A method comprising:
 structuring a semiconductor wafer from a semiconductor body with semiconductor device structures in semiconductor chip positions, which comprise MOSFET and/or IGBT structures with connecting zones of a first electrode and connecting zones of a second electrode, between which a drift section is located, wherein the drift section comprises drift zones of a first conduction type and charge compensation zones of a conduction type complementing the first conduction type, a portion of the charge compensation zones being arranged to be nearly-floating in a cell region;   applying structured dielectric layer which insulates connecting zones of a control electrode and partially extends across the nearly-floating charge compensation zones;   applying electrically conductive layer on the dielectric layer, wherein the electrically conductive layer forms the connecting zones of the control electrode, the electrically conductive layer together with the control electrode and the nearly-floating charge compensation zones forming a monolithically integrated additional capacitance C ZGD  within the cell region of the semiconductor device.   
   
   
       18 . The method of  claim 17 , wherein a thinner structured dielectric layer is applied in the region of the connecting zones of the control electrode above channel regions than above the nearly-floating charge compensation zones. 
   
   
       19 . The method of  claim 17 , wherein, when the structured dielectric layer is applied in the region of the connecting zones above channel regions, the structured electrically conductive layer is used as gate oxide. 
   
   
       20 . The method of  claim 17 , wherein, before the dielectric layer is applied around the nearly-floating charge compensation zones, a trench is produced near the surface in the semiconductor body, which is then filled with the dielectric material as the structured dielectric layer is applied. 
   
   
       21 . The method of  claim 17 , wherein, in the region of the nearly-floating charge compensation zones, the layers are applied to the front side of the dielectric body in the sequence of dielectric layer, intermediate insulating layer and metal layer. 
   
   
       22 . The method of  claim 17 , wherein, before the application of the structured dielectric layer in the region of the nearly-floating charge compensation zones, a layer of the second conduction type is introduced into the semiconductor body, which extends to an adjacent body zone or to a conductively connected charge compensation zone. 
   
   
       23 . The method of  claim 22 , wherein contiguous groups of nearly-floating charge compensation zones are formed, which are surrounded by conductively connected charge compensation zones. 
   
   
       24 . The method of  claim 17 , wherein a higher concentration of doping material is used for conductively connected charge compensation zones in a near-surface region than in the remaining region of the drift section, and wherein there is no such increased doping in the near-surface region for the nearly-floating charge compensation zones.