US2009172434A1PendingUtilityA1
Latency based platform coordination
Est. expiryDec 31, 2027(~1.5 yrs left)· nominal 20-yr term from priority
G06F 1/3203G06F 1/3246G06F 1/329Y02D10/00
52
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
In some embodiments, an electronic apparatus comprises at least one processor, a plurality of components, and a policy engine comprising logic to receive latency data from one or more components in the electronic device, compute a minimum latency tolerance value from the latency data, and determine a power management policy from the minimum latency tolerance value.
Claims
exact text as granted — not AI-modified1 . A method to implement latency based platform coordination in an electronic device, comprising:
receiving, in a policy engine, latency data from one or more components in the electronic device; computing a minimum latency tolerance value from the latency data; and determining a power management policy from the minimum latency tolerance value.
2 . The method of claim 1 , wherein receiving, in a policy engine, latency data from one or more components in the electronic device comprises receiving a snoop latency tolerance and a non-snoop latency tolerance from the one or more components
3 . The method of claim 2 , wherein:
the latency data from the one or more components is transmitted via an intermediate bridge/switch device the bridge has at least one delay value for data transmitted via the bridge/switch device; and the bridge deducts the delay value from the latency data.
4 . The method of claim 3 , wherein:
the bridge comprises a first delay value when the bridge is in a low power state and a second delay value when the bridge is in an active power state; and the bridge deducts one of the first delay value or the second delay value from the latency data.
5 . The method of claim 1 , wherein computing a minimum latency tolerance value from the latency data comprises:
comparing a plurality of latency values received from a plurality of components; and selecting the lowest latency value from the plurality of latency values.
6 . The method of claim 1 , wherein the policy engine monitors latency values over time during operation of the electronic device and updates power management policies as a function of changes in the latency tolerance values.
7 . The method of claim 1 , wherein determining a power management policy from the minimum latency tolerance value comprises selecting a sleep state that permits the system to meet the minimum latency tolerance value.
8 . An electronic apparatus, comprising:
at least one processor; a plurality of components; and a policy engine comprising logic to:
receive latency data from one or more components in the electronic device;
compute a minimum latency tolerance value from the latency data; and
determine a power management policy from the minimum latency tolerance value.
9 . The electronic apparatus of claim 8 , wherein the policy engine further comprises logic to receive a snoop latency tolerance and a non-snoop latency tolerance from the one or more components
10 . The electronic apparatus of claim 9 , wherein:
the latency data from the one or more components is transmitted via an intermediate bridge/switch device the bridge has at least one delay value for data transmitted via the bridge/switch device; and the bridge deducts the delay value from the latency data.
11 . The electronic apparatus of claim 10 , wherein:
the bridge comprises a first delay value when the bridge is in a low power state and a second delay value when the bridge is in an active power state; and the bridge deducts one of the first delay value or the second delay value from the latency data.
12 . The electronic apparatus of claim 8 , wherein the policy engine further comprises logic to:
compare a plurality of latency values received from a plurality of components; and select the lowest latency value from the plurality of latency values.
13 . The electronic apparatus of claim 8 , wherein the policy engine further comprises logic to monitor latency values over time during operation of the electronic device and updates power management policies as a function of changes in the latency tolerance values.
14 . The electronic apparatus of claim 8 , wherein the policy engine further comprises logic to select a sleep state that permits the system to meet the minimum latency tolerance value.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.