US2009181496A1PendingUtilityA1

Multi-layer substrate and manufacture method thereof

Assignee: PRINCO CORPPriority: Jun 20, 2007Filed: Oct 22, 2008Published: Jul 16, 2009
Est. expiryJun 20, 2027(~0.9 yrs left)· nominal 20-yr term from priority
Inventors:Chih-Kuang Yang
H05K 3/20H05K 3/3452H05K 2201/10674H05K 1/111H10W 72/9415H10W 72/923H10W 72/90H10W 72/20
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Claims

Abstract

Disclosed are a multi-layer substrate and a manufacture method thereof. The multi-layer substrate of the present invention comprises a surface dielectric layer and at least one bond pad layer. The surface dielectric layer is located at a surface of the multi-layer substrate. The bond pad layer is embedded in the surface dielectric layer to construct the multi-layer substrate with the surface dielectric layer of the present invention. The manufacture method of the present invention forms at least one bond pad layer on a flat surface of a carrier and then forms the surface dielectric layer to cover the bond pad layer where the bond pad layer is embedded therein. After the multi-layer substrate is separated from the carrier, the bond pad layer and the surface dielectric layer construct a flat surface of the multi-layer substrate.

Claims

exact text as granted — not AI-modified
1 . A manufacture method of a multi-layer substrate, comprising steps of:
 forming at least one bond pad layer on a flat surface of a carrier;   forming a surface dielectric layer, covering the bond pad layer, and embedding the bond pad layer therein to construct the multi-layer substrate; and   separating the multi-layer substrate from the carrier.   
   
   
       2 . The manufacture method of  claim 1 , wherein the step of forming the surface dielectric layer makes at least one lateral of the bond pad layer bonds closely with the surface dielectric layer. 
   
   
       3 . The manufacture method of  claim 1 , wherein the step of forming the surface dielectric layer makes a surface of the bond pad layer and a top surface of the surface dielectric layer contacting the carrier own a coplanarity. 
   
   
       4 . The manufacture method of  claim 1 , further comprising a step of coating a solder mask layer on the surface of the carrier before the step of forming the bond pad layer. 
   
   
       5 . The manufacture method of  claim 4 , wherein the step of separating the multi-layer substrate from the carrier is to separate the solder mask layer from the carrier. 
   
   
       6 . The manufacture method of  claim 5 , further comprising a step of making a hole to the solder mask layer at a position of the bond pad layer to expose thereof after the step of separating the solder mask layer from the carrier. 
   
   
       7 . The manufacture method of  claim 1 , further comprising a step of coating a solder mask layer on a surface of the multi-layer substrate after the step of separating the multi-layer substrate from the carrier. 
   
   
       8 . The manufacture method of  claim 1 , further comprising a step of connecting the bond pad layer with a device after the step of separating the multi-layer substrate from the carrier. 
   
   
       9 . The manufacture method of  claim 8 , wherein the connecting to the device is a Flip-Chip package.

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