Method of manufacturing a semiconductor device

Abstract

Scale down design has posed problems in an increase in the resistance value of an interconnection structure and a decrease in the resistance to electromigration and stress migration. The present invention provides an interconnection structure of a high-reliability semiconductor device which has a low resistance value even in the case of scale down design and does not produce electromigration or stress migration, and a method of manufacturing the interconnection structure. Provided are a semiconductor device which has an interconnection or a connection plug, both of which are fabricated from a mixture of a metal and carbon nanotubes, in an interconnection trench or a via hole, both of which are formed on an insulating film on a substrate on which a semiconductor device element is formed, and a method of manufacturing this semiconductor device.

1 . A method of manufacturing a semiconductor device, wherein the method comprises the step of forming particles of nanometer size on an insulating base, the step of causing a nanomaterial to grow on the particles of nanometer size, the step of depositing a metal on the substrate on which the nanomaterial has grown, and the step of working the metal including the nanomaterial into an interconnection. 
     
     
         2 . A method of manufacturing a semiconductor device, wherein the method comprises the step of forming a trench in an insulating base, the step of forming particles of nanometer size at least in a bottom portion of the trench, the step of causing a nanomaterial to grow on the particles of nanometer size, the step of depositing a metal so that the trench is embedded with the metal, and the step of working the metal including the nanomaterial into an interconnection. 
     
     
         3 . The method of manufacturing a semiconductor device according to  claim 2 , wherein the insulating base has an interconnection in a lower layer or a device element formed on the semiconductor substrate and that at least part of the lower-layer interconnection or the device element is exposed to part of the bottom portion of the trench formed in the insulating base. 
     
     
         4 . The method of manufacturing a semiconductor device according to  claim 1 , wherein the particles of nanometer size are any of iron, platinum, nickel, cobalt or silicide substances of nickel and cobalt, and iron oxides. 
     
     
         5 . The method of manufacturing a semiconductor device according to  claim 2 , wherein the particles of nanometer size are any of iron, platinum, nickel, cobalt or silicide substances of nickel and cobalt, and iron oxides. 
     
     
         6 . The method of manufacturing a semiconductor device according to  claim 1 , wherein the nanomaterial is a fibrous carbon nanomaterial, a particle-like carbon nanomaterial or a thin silicon wire. 
     
     
         7 . The method of manufacturing a semiconductor device according to  claim 2 , wherein the nanomaterial is a fibrous carbon nanomaterial, a particle-like carbon nanomaterial or a thin silicon wire. 
     
     
         8 . The method of manufacturing a semiconductor device according to  claim 1 , wherein in the step of depositing a metal, the metal is deposited by a plating method or an MOCVD method. 
     
     
         9 . The method of manufacturing a semiconductor device according to  claim 2 , wherein in the step of depositing a metal, the metal is deposited by a plating method or an MOCVD method. 
     
     
         10 . A method of manufacturing a semiconductor device, wherein the method comprises the step of forming a metal plated film on an insulating base, the metal plated film containing a nanomaterial by using a plating liquid containing the nanomaterial, and the step of working the metal plated film containing the nanomaterial into an interconnection. 
     
     
         11 . A method of manufacturing a semiconductor device, wherein the method comprises the step of forming a trench in an insulating base, the step of forming a metal plated film containing a nanomaterial by using a plating liquid containing the nanomaterial in such a manner as to embed at least the trench, and the step of working the metal plated film containing the nanomaterial into an interconnection. 
     
     
         12 . The method of manufacturing a semiconductor device according to  claim 11 , wherein at least part of the lower-layer interconnection and the device element is exposed to part of a bottom portion of the trench formed on the insulating base. 
     
     
         13 . The method of manufacturing a semiconductor device according to  claim 10 , wherein the nanomaterial is a fibrous carbon nanomaterial, a granular carbon nanomaterial or a thin silicon wire. 
     
     
         14 . The method of manufacturing a semiconductor device according to  claim 11 , wherein the nanomaterial is a fibrous carbon nanomaterial, a granular carbon nanomaterial or a thin silicon wire.