Method of forming a multilayer structure

Abstract

Method of forming a multilayer structure by electroetching or electroplating on a substrate. A seed layer is arranged on the substrate and a master electrode is applied thereto. The master electrode has a pattern layer forming multiple electrochemical cells with the substrate. A voltage is applied for etching the seed layer or applying a plating material to the seed layer. A dielectric material ( 9 ) is arranged between the structures ( 8 ) thus formed. The dielectric layer is planarized for uncovering the structure below and another structure layer is formed on top of the first. Alternatively, the dielectric layer is applied with a thickness two layers and the structure below is accessed by selective etching of the dielectric layer for selectively uncovering the top surface of the structure below. Multiple structure layer may also be formed in one step.

1 - 76 . (canceled) 
     
     
         77 . A method of forming a multilayer structure by electrochemical plating on a substrate, wherein said substrate or said substrate layer comprises a via, the method comprising:
 a) arranging an electrically conducting seed layer on at least a part of the substrate or a substrate layer and said via;   b) applying a master electrode, in which said insulating pattern layer is provided with cavities at least opposite to said vias, and wherein said cavities have a width which is slightly smaller, equal or slightly larger than the width of said via; and a predeposited anode material is arranged in said cavities;   c) applying a voltage between said conducting electrode layer and said seed layer for transferring at least some parts of said anode material for forming plated structures in said vias.   
     
     
         78 . A method of forming a structure by electrochemical plating on a substrate provided with a conducting material structure, comprising:
 a) arranging an electrically conducting seed layer on at least a part of the substrate;   b) applying a master electrode on said seed layer, said master electrode having an electrically conducting electrode layer, an anode material and an insulating pattern layer for forming at least one electrochemical cell comprising an electrolyte in the area enclosed by said anode material, said insulating pattern layer and said seed layer, said cavity enclosing at least a part of said conducting material structure; wherein said anode material is being in electrical contact with said conducting electrode layer;   c) applying a voltage between said conducting electrode layer and said seed layer so that said seed layer forms a cathode for transferring at least some of said anode material in said at least one cell to said seed layer for forming plated structures onto said seed layer and said conducting material structures corresponding to the cavities of the insulating pattern layer on the master electrode;   d) separating said master electrode from said substrate.   
     
     
         79 . The method of  claim 78 , further comprising:
 b1) applying a further master electrode on said seed layer, said master electrode having an electrically conducting electrode layer, an anode material and an insulating pattern layer for forming at least one electrochemical cell comprising an electrolyte in the area enclosed by said anode material, said insulating pattern layer and said seed layer, said cavity enclosing at least a part of said conducting material structure and plated structures; wherein said anode material is being in electrical contact with said conducting electrode layer;   c1) applying a voltage between said conducting electrode layer and said seed layer so that said seed layer forms a cathode for transferring at least some of said anode material in said at least one cell to said seed layer for forming plated structures onto said seed layer and said conducting material structures and plated structures corresponding to the cavities of the insulating pattern layer on the master electrode; and   d1) separating said master electrode from said substrate.   
     
     
         80 . The method of any one of  claims 77  and  78 , further comprising:
 e) removing said seed layer in non-plated areas.   
     
     
         81 . The method of any one of  claims 77  and  78 , wherein said planarization step comprises performing a polishing step until said material surface is substantially planar and a subsequent etching step of said material surface until at least part of said structures is uncovered. 
     
     
         82 . The method of any one of  claims 77  and  78 , wherein a planarizing material is applied into said material layer prior to performing said planarization step of said material layer. 
     
     
         83 . The method of  claim 82 , wherein said planarizing material is applied with a method selected from the group comprising: spin-coating, spray-coating, powder-coating, dip-coating, roller-coating, sputtering, PVD, CVD, PECVD, electrodeposition, and combinations thereof. 
     
     
         84 . The method of any one of  claims 77  and  78 , wherein an end-point detection method is used so as to determine when said planarization step is completed. 
     
     
         85 . The method of any one of  claims 77  and  78 , wherein the step of planarization comprises:
 applying a plate above said material layer and applying a pressure on said plate for equalizing the material in said material layer, while in a flowable condition.   
     
     
         86 . The method of  claim 85 , wherein said flowable condition is obtained by heating said material layer, whereupon the material is cooled after planarization. 
     
     
         86 . The method of  claim 85 , wherein said step of applying the plate is performed before curing said material, whereupon the material is cured after planarization, such as by applying infrared or ultraviolet radiation. 
     
     
         87 . The method of any one of  claims 77  and  78 , wherein the seed layer is made of a material selected from the group comprising: Ru, Os, Hf, Re, Cr, Au, Ag, Cu, Sn, Ti, TiN, TiW, Ni, NiB, NiP, NiCo NiBW, NiM-P, Al, Pd, Pt, W, Ta, TaN, Rh, Wo, Co, CoReP, CoP, CoWP, CoWB, CoWBP alloys of these material, Si, conducting polymers such as polyaniline; solder materials, such as SnPb, SnAg, SnAgCu, SnCu; alloys, such as monel and permalloy; and alloys thereof and combinations thereof. 
     
     
         88 . The method of  claim 87 , wherein the seed layer is applied by a method selected from the group comprising: chemical-vapor-deposition (CVD), metallorganic-chemical-vapor-deposition (MOCVD), physical-vapor-deposition (PVD), atomic layer deposition (ALD), sputtering, electroless plating, electroplating, electrografting, immersion deposition, and combinations thereof. 
     
     
         89 . The method of any one of  claims 77  and  78 , further comprising applying a barrier/capping layer before step a) or f). 
     
     
         90 . The method of  claim 89 , wherein said barrier/capping material comprises at least one layer of material that prevents corrosion, diffusion or electromigration of layers which are interfacing with said barrier/capping material. 
     
     
         91 . The method of  claim 89 , wherein said barrier/capping material is applied by a method selected from the group comprising: electrodeposition, MOCVD, CVD, PVD, ALD, sputtering, electroless deposition, immersion deposition, electrografting and combinations thereof. 
     
     
         92 . The method of  claim 91 , wherein said barrier/capping material is applied with a mask-less selective deposition method, such as electroless deposition, wherein deposition is obtained only in surfaces active to said deposition process, such as on said structure layer and not on said arranged material layer. 
     
     
         93 . The method of any one of  claims 77  and  78 , wherein said barrier/capping material is used as a seed layer in said step a). 
     
     
         94 . The method of any one of  claims 77  and  78 , further comprising applying an adhesion layer before applying said seed layer and/or before applying said barrier/capping material; wherein said adhesion layer increase the adhesion of said seed layer or barrier/capping layer to said arranged material layer or structures. 
     
     
         95 . The method of any one of  claims 77  and  78 , wherein said forming of at least one electrochemical cell comprises a method for aligning said insulating pattern layer to a patterned layer on said substrate, wherein said aligning method comprises using alignment marks on the front side and/or back side of said master electrode which are aligned to corresponding alignment marks on said substrate. 
     
     
         96 . The method of any one of  claims 77  and  78 , wherein said formed electrochemical cell comprises a solution of cations, such as copper or nickel ions, and anions, such as sulfate ions, for electrochemical etching and/or plating. 
     
     
         97 . The method of  claim 96 , wherein said electrolyte comprises suppressors, levelers and/or accelerators, for instance PEG (poly-ethylene glycol) together with chloride ions and/or with SPS (bis-(3-sulfopropyl)-disulfide), MPSA and/or sodium-lauryl-sulphate. 
     
     
         98 . The method of any one of  claims 77  and  78 , wherein said anode material is arranged onto said conducting electrode layer in the cavities of said insulating pattern layer using a method selected from the group comprising: electroplating, electroless plating, immersion plating, CVD, MOCVD, powder-coating, chemical grafting, electrografting and combinations thereof. 
     
     
         99 . The method of any one of  claims 77  and  78 , wherein said separation step d) is performed by holding said substrate in a fixed position and moving said master electrode in a direction perpendicular to the substrate surface; or
 by holding said master electrode in a fixed position and moving said substrate in a direction perpendicular to the master electrode surface; or   by performing the separation in a less parallel manner so as to ease the separation; or by a combination thereof.   
     
     
         100 . The method of any one of  claims 77  and  78 , wherein said step e) removing said seed layer is performed by wet-etching, dry-etching, electrochemical etching or by combinations thereof. 
     
     
         101 . The method of  claim 100 , further comprising applying a protective coating which is covering all or substantially all of said seed layer, barrier/capping layer and/or structure layer; treating said protective coating with an anisotropic etch, thereby uncovering the top of said seed layer, barrier/capping layer and/or structure layer between the structures while leaving a protective layer on the side walls of said structures; removing said seed layer and/or barrier layer between said structures. 
     
     
         102 . The method of any one of  claims 77  and  78 , wherein said material layer is at least one layer of a dielectric material and is applied by a method selected from the group comprising: spin-coating, spray-coating, powder-coating, dip-coating, roller-coating, sputtering, PVD, CVD, Plasma-Enhanced-Chemical-Vapor-Deposition (PECVD), electrodeposition, and combinations thereof. 
     
     
         103 . The method of any one of  claims 77  and  78 , wherein said material layer is at least one layer of a metal and is applied by a method selected from the group comprising: electrodeposition, MOCVD, CVD, PVD, ALD, sputtering, electroless deposition, immersion deposition, electrografting and combinations thereof. 
     
     
         104 . The method of any one of  claims 77  and  78 , further comprising:
 arranging an etch-stop layer on top of the structures before the step f) of arranging the material.   
     
     
         105 . The method of any one of  claims 77  and  78 , wherein said material layer is a porous low-k dielectric material and a pore sealing operation is performed prior to applying further layers of material onto it. 
     
     
         106 . The method of any one of  claims 77  and  78 , further comprising forming a structure layer before step h); wherein forming a structure layer comprises lithography methods; deposition methods such as electrodeposition, electroless deposition; wet-etching or dry-etching methods.