US2009231496A1PendingUtilityA1

Display control system for spatial light modulators

Assignee: NISHINO HIROKAZUPriority: Nov 1, 2003Filed: Mar 27, 2009Published: Sep 17, 2009
Est. expiryNov 1, 2023(expired)· nominal 20-yr term from priority
G09G 3/2011H04N 9/312G09G 3/2081G09G 3/2022H04N 5/7458G09G 3/346G02B 26/0833
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Claims

Abstract

A display control system, comprises: a spatial light modulator (SLM) constituted by a plurality of pixel elements placed in array; a first control unit for controlling each of the plurality of pixel elements under a state of ON or OFF; a second control unit for controlling each of the plurality of pixel elements under a state other than the ON or OFF states; a control changeover unit for dividing one frame period, for each pixel element of the plurality thereof, into a period of the first control unit controlling and that of the second control unit controlling, and also changing over between a control of the first control unit and that of the second control unit for each pixel element of the plurality thereof; and a data division unit for dividing input data to each of the plurality of pixel elements into first control unit-use data, which is input to the first control unit, and second control unit-use data which is input to the second control unit in accordance with the content of the present input data.

Claims

exact text as granted — not AI-modified
1 . A display system comprising:
 a spatial light modulator comprising a plurality of pixel elements for modulating a light do display an image;   a data dividing circuit for receiving an input data to divide the input data into a first data and a second data each having a plurality of bits wherein said dividing circuit further changing a number of bits allocated for said first and second data; and   a controller for applying the first data for controlling each of said pixel elements to operate in an ON state and an OFF state, and said controller further applies said second data to control each of the pixel elements to operate in an intermediate state between the ON state and the OFF state.   
   
   
       2 . The display system according to  claim 1 , wherein:
 the data dividing circuit further changing the number of bits allocated for the first and the second data to control each of the pixel elements to operate with a shorter time period in the intermediate state than a time period to operate in the ON and OFF states.   
   
   
       3 . The display system according to  claim 1 , wherein:
 the data dividing circuit further changing the number of bits allocated for the first and the second data to control each of the pixel elements to operate with a longer time period in the intermediate state than a time period to operate in the ON and OFF states.   
   
   
       4 . The display system according to  claim 1 , wherein:
 the data dividing circuit further changing the number of bits allocated for the first and the second data by increasing the number of bits of the second data when at least one of a set of predetermined bits of the input data having a bit value of zero.   
   
   
       5 . The display system according to  claim 1 , wherein:
 the data dividing circuit further changing the number of bits allocated for the first and the second data by increasing the number of bits of the second data when a period of time for operating each of the pixel elements in an intermediate state is shorter than a predetermined length of time.   
   
   
       6 . The display system according to  claim 1 , wherein:
 the data dividing circuit further repetitively adjusting the number of bits allocated for the first and the second data until the number of bits of the first data and the second data having a ratio approximately equal to a target division ratio.   
   
   
       7 . The display system according to  claim 1 , wherein:
 the data dividing circuit further receives an image data for adjusting the number of bits allocated for the first and the second data based on contents represented by the image data.   
   
   
       8 . A display system comprising:
 a spatial light modulator comprising a plurality of pixel elements for modulating a light do display an image;   a data dividing circuit for receiving an input data to divide the input data into a first data and a second data each having a plurality of bits; and   a controller for applying the first data for controlling each of said pixel elements to operate in a first operational state, and said controller further applies said second data to control each of the pixel elements to operate in a second operational state different from the first operational state.   
   
   
       9 . The display system according to  claim 8 , wherein:
 the spatial light modulator comprising a mirror device wherein each of said pixel elements comprising a micromirror supported on a deflectable hinge for deflecting the micromirror to an ON direction, an OFF direction and an Intermediate direction.   
   
   
       10 . A display system comprising:
 a spatial light modulator comprising a plurality of pixel elements each of the pixel elements further includes at least a first sub-pixel component and a second pixel component for modulating a light do display an image;   a data dividing circuit for receiving an input data to divide the input data into a first data and a second data each having a plurality of bits; and   a controller for applying the first data for controlling each of said first sub-pixel components and said controller further applies said second data to control each of the second sub-pixel components for applying the first and second data for displaying the image with different levels of gray scales.   
   
   
       11 . The display system according to  claim 10 , wherein:
 the data dividing circuit further receives a light intensity data of the first sub-pixel component and said second pixel component for adjusting the number of bits allocated for the first data and the second data.

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