Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application

Abstract

A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.

1 . A method comprising:
 receiving a request at a first node of a wireless transceiver from a second node of the wireless transceiver for access to a shared resource of the wireless transceiver, wherein the second node is configured to access the shared resource at a first clock frequency and wherein the shared resource is configured to operate at a variable clock frequency;   receiving a request at the first node from a third node of the wireless transceiver for access to the shared resource, wherein the third node is configured to access the shared resource at a second clock frequency, wherein the second clock frequency is lower than the first clock frequency;   regulating access to the shared resource;   setting, by the first node, a frequency of a clock that controls access to the shared resource to the first clock frequency when access to the shared resource is granted to the second node; and   setting, by the first node, the frequency of the clock to the second clock frequency when access to the shared resource is granted to the third node.   
   
   
       2 . The method of  claim 1  wherein the setting, by the first node, the frequency of the clock that controls access to the shared resource to the first clock frequency comprises:
 generating a first clock signal having a frequency equal to the first clock frequency; and   providing the first clock signal to the shared resource to clock access to the shared resource for the second node.   
   
   
       3 . The method of  claim 1  wherein the setting, by the first node, the frequency of the clock that controls access to the shared resource to the second clock frequency comprises:
 generating a second clock signal having a frequency equal to the second clock frequency; and   providing the second clock signal to the shared resource to clock access to the shared resource for the third node.   
   
   
       4 . The method of  claim 3  wherein generating the second clock signal comprises removing pulses from the first clock frequency. 
   
   
       5 . The method of  claim 1  wherein the second node and third node are configured on a chip and wherein the chip is powered by a battery. 
   
   
       6 . The method of  claim 5  wherein regulating access to the shared resource comprises arbitrating access to the shared resource by the first node to save power on the battery. 
   
   
       7 . The method of  claim 1  wherein the first clock frequency is at least twice the second clock frequency. 
   
   
       8 . A method comprising:
 receiving data at a wireless transceiver;   storing the data in a shared resource of the wireless transceiver;   controlling access to the shared resource between a first node of the wireless transceiver and a second node of the wireless transceiver;   setting a frequency of a clock to a first clock frequency when access to the shared resource is granted to the first node; and   setting the frequency of the clock to a second clock frequency when access to the shared resource is granted to the second node, wherein the second clock frequency is lower than the first clock frequency.   
   
   
       9 . The method of  claim 8  wherein the setting the frequency of the clock to the first clock frequency comprises providing access to the shared resource to the first node. 
   
   
       10 . The method of  claim 8  wherein the setting the frequency of the clock to the second clock frequency comprises:
 receiving an input of the first clock frequency; and   selectively removing pulses from the input to generate the second clock frequency.   
   
   
       11 . The method of  claim 8  wherein the setting the frequency of the clock to the first clock frequency comprises decoding the data in the shared resource. 
   
   
       12 . The method of  claim 8  wherein the setting the frequency of the clock to the second clock frequency comprises encoding the data in the shared resource. 
   
   
       13 . A system comprising:
 a wireless transceiver configured to receive data;   a shared resource configured to store the received data, the shared resource including a clock frequency;   a control unit configured to control access to the shared resource between a first node of the wireless transceiver and a second node of the wireless transceiver; and   a clock controller configured to set the clock frequency of the shared resource to a first clock frequency if the control unit grants access to the first node, and set the clock frequency of the shared resource to a second clock frequency if the control unit grants access to the second node, wherein the first clock frequency is greater than the second clock frequency.   
   
   
       14 . The system of  claim 13  wherein the first node is configured to decode the received data stored in the shared resource. 
   
   
       15 . The system of  claim 13  wherein the second node is configured to encode the received data stored in the shared resource. 
   
   
       16 . The system of  claim 13  wherein the first clock frequency is at least twice the second clock frequency. 
   
   
       17 . The system of  claim 13  wherein the clock controller is configured to push either the first clock frequency from the first node or the second clock frequency from the second node based on an arbitration by the control unit. 
   
   
       18 . The system of  claim 13  further comprising a battery configured to power the system, wherein the system comprises a system on a chip and wherein the system on a chip comprises the first node, the second node, the control unit, and the clock controller. 
   
   
       19 . The system of  claim 13  further comprising a pulse swallower configured to generate the second clock frequency by receiving an input of the first clock frequency and selectively removing pulses from the input. 
   
   
       20 . The system of  claim 13  wherein:
 the wireless transceiver is configured to receive an encoded audio signal;   the control unit is configured to grant access to the shared resource to the first node;   the clock controller is configured to set the clock frequency of the shared resource to the first clock frequency;   the first node is configured to decode the audio signal and store the decoded audio signal in the shared resource; and   the wireless transceiver is configured to output the decoded signal.