US2009246914A1PendingUtilityA1

Semiconductor package and method of manufacturing the same

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Assignee: CHO YOUNG-SANGPriority: Jul 6, 2006Filed: Jun 5, 2009Published: Oct 1, 2009
Est. expiryJul 6, 2026(expired)· nominal 20-yr term from priority
H10W 72/01255H10W 72/251H10W 74/141H10W 72/20H10W 72/00H10D 62/117
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Claims

Abstract

A package may include a semiconductor chip mounted on a film substrate. A method of manufacturing the same may involve providing a semiconductor chip. The semiconductor chip may include recesses and bumps. A film substrate including a through hole may be provided. The semiconductor chip may be inserted into the through hole of the film substrate. Circuit wires may be formed on the film substrate to contact the bumps of the semiconductor chip.

Claims

exact text as granted — not AI-modified
1 . A method of manufacturing a package, the method comprising:
 providing a semiconductor chip having recesses and bumps;   providing a film substrate including a through hole;   inserting the semiconductor chip into the through hole of the film substrate; and   forming circuit wires on the film substrate and the bumps of the semiconductor chip.   
     
     
         2 . The method of  claim 1 , wherein providing the semiconductor chip comprises:
 forming an insulation layer on a substrate structure including pad electrodes and a boundary line for dividing the substrate structure into multiple unit semiconductor chips;   etching the insulation layer to expose the pad electrodes;   forming the bumps on the exposed pad electrodes;   planarizing the insulation layer and the bumps;   etching a portion of the substrate structure located at the boundary line and regions adjacent to the boundary line to form the recesses; and   sawing the substrate structure along the boundary line to form the plurality of unit semiconductor chips.   
     
     
         3 . The method of  claim 2 , wherein forming of the bumps comprises:
 forming a seed layer on the exposed pad electrodes and the insulation layer;   forming a resist pattern on the seed layer to expose portions of the seed layer on the pad electrodes; and   plating the seed layer formed on the exposed pad electrodes to form the bumps.   
     
     
         4 . The method of  claim 2 , wherein forming of the bumps comprises plating the exposed pad electrodes. 
     
     
         5 . The method of  claim 1 , wherein inserting the semiconductor chip into the through hole of the film substrate leaves a surface of the film substrate and a surface of each of the bumps flush with each other. 
     
     
         6 . The method of  claim 5 , wherein inserting the semiconductor chip into the through hole of the film substrate further comprises, after the insertion, forming adhesion layers at corner portions where the semiconductor chip and the film substrate meet each other. 
     
     
         7 . The method of  claim 1 , further comprising, after forming circuit wires,
 forming a solder resist pattern exposing edge portions of the circuit wires and covering top portions of the circuit wires; and   forming plated electrode layers on the edge portions of the circuit wires.   
     
     
         8 . The method of  claim 1 , wherein the recesses of the semiconductor chip engage with the through hole to locate the semiconductor chip in position, and such that surfaces of the bumps and the insulation layer are flush with a surface of the film substrate. 
     
     
         9 . The method of  claim 8 , wherein, after inserting the semiconductor chip, forming adhesion layers at corner portions where the semiconductor chip and the film substrate meet each other. 
     
     
         10 . The method of  claim 8 , further comprising, after forming circuit wires,
 forming a solder resist pattern exposing edge portions of the circuit wires and covering top portions of the circuit wires; and   forming plated electrode layers on the edge portions of the circuit wires.

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