Trace Routing Network

Abstract

Hardware emulation produces relevant and irrelevant trace data. Verification of a design under test requires knowledge of the relevant trace data. Data lines are provided to capture trace data from the hardware emulator's logic elements during emulation. The data lines connect the outputs of these logic elements to the inputs of a configurable interconnect circuit. The configurable interconnect circuit is capable of being programmed to select from a plurality of these inputs to connect a number of the data lines to a scan chain or trace data storage circuit. The configurable interconnect circuit can then selectively connect those data lines carrying relevant trace data to a trace data processing circuit. The trace data processing circuit may be a scan chain, analysis device or storage device or other suitable trace data processing device.

1 . A data capture circuit for use in a hardware emulator, comprising:
 a plurality of data lines, wherein each of said data lines is connected to a corresponding data capture output of a configurable physical block; and   a configurable interconnect circuit, capable of selectively connecting at least one of the data lines to a scan chain input.   
   
   
       2 . The data capture circuit of  claim 1 , wherein the configurable physical block comprises:
 a field programmable gate array; and   a flip-flop.   
   
   
       3 . The data capture circuit of  claim 1 , further comprising a scan chain. 
   
   
       4 . The data capture circuit of  claim 3 , wherein the scan chain comprises:
 a plurality of memory circuits; and   a plurality of switching circuits.   
   
   
       5 . The data capture circuit of  claim 4 , wherein:
 the memory circuit is a flip-flop; and   the switching device is a multiplexor.   
   
   
       6 . The data capture circuit of  claim 5 , wherein there are more data lines than scan chain inputs. 
   
   
       7 . The data capture circuit of  claim 1 , wherein the configurable interconnect circuit is a switching circuit. 
   
   
       8 . The data capture circuit of  claim 7 , wherein the configurable interconnect circuit is a multiplexor. 
   
   
       9 . The data capture circuit of  claim 7 , wherein the configurable interconnect circuit is a crossbar network. 
   
   
       10 . The data capture circuit of  claim 9 , wherein there are more data lines than scan chain inputs. 
   
   
       11 . A hardware emulation environment comprising:
 a data bus;   a computing system connected to the data bus;   a test bench connected to the data bus; and   a hardware emulator connected to the data bus, wherein the hardware emulator comprises:   a plurality of data lines, wherein each of said data lines is connected to a corresponding data capture output of a configurable physical block;   a configurable interconnect circuit, capable of selectively connecting at least one of the data lines to a scan chain input; and   a scan chain.   
   
   
       12 . The hardware emulation environment of  claim 11 , wherein the configurable interconnect circuit is a crossbar network. 
   
   
       13 . The hardware emulation environment of  claim 11 , wherein each of the configurable physical blocks comprise:
 a field programmable gate array; and   a flip-flop.   
   
   
       14 . The hardware emulation environment of  claim 11 , wherein the scan chain comprises:
 a plurality of memory circuits; and   a plurality of switching circuits.   
   
   
       15 . The hardware emulation environment of  claim 14 , wherein:
 the plurality of memory circuits are flip-flops; and   the plurality of switching circuits are multiplexors.   
   
   
       16 . A method of processing trace data in a hardware emulation environment comprising:
 connecting a plurality of data lines to the outputs of at least one configurable physical block;   providing a scan chain configured to process state data in a hardware emulator; and   selectively configuring a configurable interconnect circuit, such that one or more of the data lines is connected to the scan chain.   
   
   
       17 . A method of processing trace data in a hardware emulation environment comprising:
 receiving in parallel, a plurality of output data from at least one configurable physical block; and   being configured to selectively connect at least one of the output data signals to a scan chain.