Semiconductor integrated circuit

Abstract

A basic cell capable of a fixed operating frequency regardless of the configuration information, which is also capable of effectively utilizing the arithmetic logic circuit within the cell in a LSI semiconductor integrated circuit, is capable of dynamic changes in configuration information. The circuit has an input switch ISW connected to multiple data input nodes, an output switch OSW connected to multiple data output nodes, a first data path containing an arithmetic logic circuit ALU and a result storage flip-flop CFF0 between the input switch ISW and output switch OSW. The second data path containing a data transfer flip-flop between an input switch ISW and an output switch OSW, and the result storage flip-flop CFF stores the calculated result data from the arithmetic logic circuit ALU, and the data transfer flip-flop holds data input from any of the multiple data input nodes.

1 . A semiconductor integrated circuit comprising:
 a plurality of cells; and   data transfer routes between adjacent ones of said cells to provide paths for data transfer between said adjacent cells;   wherein each of the cells includes a configuration memory coupled to lines for receiving configuration data, address information and input data for changing configuration information of the cell and lines for receiving address information and for outputting data for performing a data transfer operation with an adjacent cell.   
   
   
       2 . A semiconductor integrated circuit according to  claim 1 ,
 wherein each of the configuration memories determines whether a function of the cell can be reconfigured when the cell is not currently performing a data transfer operation.   
   
   
       3 . A semiconductor integrated circuit according to  claim 1 ,
 wherein each cell includes a pair of said configuration memories and means for permitting one of the pair of configuration memories to be reconfigured while the other of the pair of configuration memories is performing a data transfer operation.   
   
   
       4 . A semiconductor integrated circuit according to  claim 2 ,
 wherein each cell includes a pair of said configuration memories and means for permitting one of the pair of configuration memories to be reconfigured while the other of the pair of configuration memories is performing a data transfer operation.