US2009289653A1PendingUtilityA1

Inspection apparatus and method for semiconductor IC

46
Assignee: PANASONIC CORPPriority: Jun 5, 2006Filed: Aug 4, 2009Published: Nov 26, 2009
Est. expiryJun 5, 2026(expired)· nominal 20-yr term from priority
G01R 31/2874G01R 31/2879
46
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Claims

Abstract

The connection between a PTC element 22 a corresponding to each semiconductor IC 11 a and a power-supply line 25 a is performed via a relay, a high voltage is supplied to the power-supply line 25 a by sequentially turning on the relays, and a high voltage is supplied to each PTC element 22 a in order, whereby it is possible to trip beforehand a PTC element 22 a connected to a DC-defective semiconductor IC 11 a . In this state, wafer level burn-in is performed together, which enables the PTC element 22 a to be positively tripped during the burn-in for the DC defect of the semiconductor IC 11 a , with the result that it is possible to increase the reliability of the burn-in.

Claims

exact text as granted — not AI-modified
1 .- 3 . (canceled) 
   
   
       4 . A semiconductor IC inspection method for performing burn-in for a plurality of semiconductor ICs, with power supply stopped to a semiconductor IC, by a PTC element, the method comprising the steps of:
 supplying power to the semiconductor ICs singly or in a plurality of numbers at a time in order and tripping the PTC element connected to any defective semiconductor IC, and   performing burn-in for each semiconductor, IC with a tripped PTC element.   wherein for each semiconductor IC having multiple power supplies, an output of a PTC element corresponding to a first power supply is capable of controlling a voltage to a PTC element corresponding to a second power supply by a relay connected to the PTC element corresponding to a first power supply.   
   
   
       5 . The semiconductor IC inspection method according to  claim 4 , wherein a voltage lower than a burn-in voltage is used as a voltage during the power supply. 
   
   
       6 . The semiconductor IC inspection method according to  claim 5 , wherein the voltage during the power supply is adjusted by a current of the power supply that supplies the voltage. 
   
   
       7 . The semiconductor IC inspection method according to  claim 4 , wherein the input of a signal to the semiconductor IC is controlled by using an output signal of the PTC element. 
   
   
       8 . The semiconductor IC inspection method according to  claim 4 , wherein the power supply is performed at a temperature lower than that during burn-in. 
   
   
       9 . (canceled) 
   
   
       10 . The semiconductor IC inspection method according to  claim 4 , wherein the burn-in is wafer-level burn-in that is performed together for the plurality of semiconductor ICs formed on a wafer. 
   
   
       11 . The semiconductor IC inspection method according to  claim 4 , wherein the semiconductor IC is a packaged semiconductor IC mounted on a burn-in board and the burn-in is package burn-in that is performed together for the plurality of semiconductor ICs mounted on the burn-in board. 
   
   
       12 .- 13 . (canceled)

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