Method of fabricating poly-crystalline silicon thin film and method of fabricating transistor using the same

Abstract

A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using ICP-CVD. After the ICP-CVD, ELA is performed while increasing energy by predetermined steps. A poly-Si active layer and a Si0 2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 A or more. An interface trap density of the Si02 can be as high as lo ∥ /cm 2 . A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

1 . A method of fabricating a TFT which comprises a substrate, a poly-Si active layer formed on the substrate, a gate insulating layer formed on the poly-Si active layer, and a gate formed on the gate insulating layer, the method comprising depositing a silicon thin film on the substrate by ICP-CVD using a diluted He. 
   
   
       2 . The method of  claim 1 , wherein the gate insulating layer is formed by ICP-CVD. 
   
   
       3 . The method of  claim 1 , further comprising:
 annealing at least one of the silicon thin film and the gate insulating layer using excimer laser annealing (ELA).   
   
   
       4 . The method of  claim 3 , wherein the ELA is performed while increasing energy by predetermined steps. 
   
   
       5 . The method of  claim 1 , wherein the diluted He is an He/SiH4 composition and a ratio of He to SiH4 is in a range from 6 to 12. 
   
   
       6 . The method of  claim 1 , wherein a deposition ratio of silicon by the ICP-CVD is 2.8 A/sec.