Clock synchronized non-volatile memory device
Abstract
A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.
Claims
exact text as granted — not AI-modified1 . A nonvolatile memory apparatus, comprising: a nonvolatile memory array; a plurality of terminals including a command terminal, a clock terminal and an other terminal; and a control circuit wherein said command terminal is capable of receiving commands which include a read command and a write command, wherein said clock terminal is capable of receiving a clock signal, wherein said nonvolatile memory array includes a plurality of word lines each of which coupled to a plurality of nonvolatile memory cells, wherein in an operation in response to said read command received from said command terminal, said control circuit controls to selecting one word line, to supplying a read voltage to said one word line, to reading data from ones of said nonvolatile memory cells coupled to said one word line, and to outputting data via said other terminal except said command terminal in response to said clock signal, and wherein in an operation in response to said write command received from said command terminal, said control circuit controls to receiving data via said other terminal except said command terminal in response to said clock signal, to selecting one word line, to supplying a program voltage to said one word line for writing data to a nonvolatile memory cell coupled to said one word line, to supplying a verify voltage to said one word line for checking whether said nonvolatile memory cell coupled to said one word line is completed writing data or not, and to repeating supplying said program voltage and supplying said verify voltage to said one word line until said nonvolatile memory cell coupled to said one word line is completed writing data.
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