Cpu power management based on utilization with lowest performance mode at the mid-utilization range

Abstract

A demand-based method and system of a processor power management is described. A processor is caused to enter a particular performance mode based on a first and a second utilization threshold. The particular performance mode includes at least a first performance mode, a second performance mode, and a third performance mode. The processor is caused to operate with a clock frequency in the third performance mode that is lower than the clock frequency of the processor in the first and second performance modes.

1 . A method comprising:
 causing a processor to enter a particular performance mode based on a first and a second utilization threshold, wherein the particular performance mode includes at least a first performance mode, a second performance mode, and a third performance mode; and   causing the processor to operate with a clock frequency in the third performance mode that is lower than the clock frequency of the processor in the first and second performance modes.   
   
   
       2 . The method of  claim 1 , further comprising:
 determining a utilization of the processor;   placing the processor in the first performance mode in response to a determination that the utilization is less than or equal to the first utilization threshold;   placing the processor in the second performance mode in response to a determination that the utilization is greater than the second utilization threshold, the first utilization threshold being lower than the second utilization threshold; and   placing the processor in the third performance mode in response to a determination that the utilization is between the first utilization threshold and the second utilization threshold,   wherein placing the processor in the third performance mode includes operating the processor in the first performance mode and reducing a clock frequency of the processor.   
   
   
       3 . The method of  claim 2 , wherein a voltage level of the processor is lower in the first performance mode than in the second performance mode. 
   
   
       4 . The method of  claim 2 , wherein a voltage level of the processor is higher in the second performance mode than in the first performance mode and in the second performance mode. 
   
   
       5 . The method of  claim 2 , wherein a voltage level of the processor is also lower in the third performance mode than in the second performance mode. 
   
   
       6 . The method of  claim 1 , further comprising:
 receiving a user-specified power management profile; and   selecting the particular performance mode from the first, second, and third performance modes based on the user-specified power management profile,   wherein the value of the first, second, and third utilization thresholds is adjusted in response to the user-specified power management profile.   
   
   
       7 . The method of  claim 6 , further comprising:
 powering the processor with a DC power source.   
   
   
       8 . The method of  claim 2 , further comprising:
 placing the processor in a fourth performance mode in response to a determination that the utilization is between the first utilization threshold and a third utilization threshold, the third utilization threshold between the first utilization threshold and the second utilization threshold.   
   
   
       9 . The method of  claim 8 , further comprising:
 placing the processor in a fifth performance mode in response to a determination that the utilization is between the second utilization threshold and the third utilization threshold.   
   
   
       10 . A machine-readable medium storing instructions which when executed by a machine, to cause the machine to perform the method of  claim 1 . 
   
   
       11 . A machine-readable medium having a plurality of instructions executable by a data processing system embodied therein, wherein said instructions when executed to cause said data processing system to perform the following operations, comprising:
 causing a central processor to enter a particular performance mode based on a first and a second utilization threshold, wherein the particular performance mode includes at least a first performance mode, a second performance mode, and a third performance mode; and   causing the central processor to operate with a clock frequency in the third performance mode that is lower than the clock frequency of the central processor in the first and second performance modes.   
   
   
       12 . The machine-readable medium of  claim 1 , further comprising:
 determining a utilization of the central processor;   placing the central processor in the first performance mode in response to a determination that the utilization is less than or equal to the first utilization threshold;   placing the central processor in the second performance mode in response to a determination that the utilization is greater than the second utilization threshold, the first utilization threshold being lower than the second utilization threshold; and   placing the central processor in the third performance mode in response to a determination that the utilization is between the first utilization threshold and the second utilization threshold,   wherein placing the central processor in the third performance mode includes operating the central processor in the first performance mode and reducing a clock frequency of the central processor.   
   
   
       13 . The machine-readable medium of  claim 12 , wherein a voltage level of the central processor is lower in the first performance mode than in the second performance mode. 
   
   
       14 . The machine-readable medium of  claim 12 , wherein a voltage level of the central processor is higher in the second performance mode than in the first performance mode and in the second performance mode. 
   
   
       15 . The machine-readable medium of  claim 12 , wherein a voltage level of the central processor is also lower in the third performance mode than in the second performance mode. 
   
   
       16 . A data processing system comprising:
 a central processing unit to process data and execute instructions;   a memory to store a plurality of instructions which when executed by said central processing unit cause said data processing system to:
 cause the central processing unit to enter a particular performance mode based on a first and a second utilization threshold, wherein the particular performance mode includes at least a first performance mode, a second performance mode, and a third performance mode; and 
 cause the central processing unit to operate with a clock frequency in the third performance mode that is lower than the clock frequency of the central processing unit in the first and second performance modes. 
   
   
   
       17 . The data processing system of  claim 16 , further comprising:
 determining a utilization of the central processing unit;   placing the central processing unit in the first performance mode in response to a determination that the utilization is less than or equal to the first utilization threshold;   placing the central processing unit in the second performance mode in response to a determination that the utilization is greater than the second utilization threshold, the first utilization threshold being lower than the second utilization threshold; and   placing the central processing unit in the third performance mode in response to a determination that the utilization is between the first utilization threshold and the second utilization threshold,   wherein placing the central processing unit in the third performance mode includes operating the central processing unit in the first performance mode and reducing a clock frequency of the central processing unit.   
   
   
       18 . The data processing system of  claim 17 , wherein a voltage level of the central processing unit is lower in the first performance mode than in the second performance mode. 
   
   
       19 . The data processing system of  claim 17 , wherein a voltage level of the central processing unit is higher in the second performance mode than in the first performance mode and the second performance mode. 
   
   
       20 . The data processing system of  claim 17 , wherein a voltage level of the central processing unit is also lower in the third performance mode than in the second performance mode.